Vídeo

Using Nested Parallelism in OpenMP*

Multi-level parallelism with OpenMP* deserves your consideration—even if you've rejected it in the past. OpenMP nesting is turned off by default by most implementations.

Criado por JEONGNIM K. (Intel) Última atualização em 12/12/2018 - 18:08
Article

IDF15 - Webcast: Code Modernization Best Practices

Intel® Xeon® and Intel® Xeon Phi™ processor based platforms provide multiple levels of parallel execution resources. The amount of compute power of these resources is growing with every product generation, yet most applications do not fully utilize the available computing resources. This session will provide details on the growth in hardware resources and characterize performance using different...
Criado por Última atualização em 06/07/2019 - 11:37
Vídeo

Vector-Parallel Code Modernization Webinar

Learn how to optimize some difficult loops with Intel® compilers for Fortran*, C, and C++.

Criado por Tim P. (Blackbelt) Última atualização em 12/12/2018 - 18:08
Vídeo

Knights Landing – An Overview for Developers

In this webinar, James Reinders, will cover the essential knowledge needed for effectively utilizing the extraordinary parallelism in the new Intel® Xeon Phi™ processor (code named Knights Landing)

Criado por administrar Última atualização em 21/03/2019 - 12:08
Vídeo

Code for Speed with High Bandwidth Memory on Intel® Xeon Phi™ Processors

The Intel’s 2nd generation Xeon Phi™ processor family x200 product (code-name Knights Landing) brings in new memory technology, a high bandwidth on package memory called Multi-Channel DRAM (MCDRAM)

Criado por administrar Última atualização em 14/06/2019 - 15:27
Vídeo

Vectorization: The “Other” Parallelism You Need

We will describe, with C and Fortran examples, new opportunities for performance-enhancing vectorization provided by the Intel® AVX-512 instruction set on the processor code named Knights Landing.

Criado por administrar Última atualização em 21/03/2019 - 12:08