How to manually target different Intel® Core™ processors, Intel® Xeon® processors and Intel® Xeon Phi™ processorsManual cpu dispatch may be used to write code that will be executed only on Intel processors such as 2nd generation Intel® Core™ processors (formerly code named “Sandy Bridge”) and 3rd generation Intel® Core™ processors (formerly code named "Ivy Bridge") with support for Intel® Advanced Vector Extensions, or 4th generation Intel® Core™ processors (formerly code named "Haswell"), 5th generation...
To use HLE/RTM to improve lock scalability the lock library needs to be enabled.
Intel recently released the 4th Generation Intel® Core™ processors, which have Intel® Transaction
In a previous post I discussed the Intel® Tra
Lock elision is a new way to scale programs. It requires following some rules for correctness and good performance.