Parallel Programming

Advanced Computer Concepts for The (Not So) Common Chef: First Some Terminology Part 2


Now that we know what a core is, let’s dive into another source of confusion.

This section gets a little deeper into techno babble than I wanted for this series of blogs. If you are so inclined, my gourmet readers, you can either skip or read on. I believe the rest of the blogs can be understood with or without this little aside. But for those of you who are already familiar with threading, it may give you more insight than would be the case otherwise.

Advanced Computer Concepts For The (Not So) Common Chef: Terminology Pt 1

Before we start, I will use the next two blogs to clear up some terminology. If you are familiar with these concepts, I give you permission to jump to the next section.  I suggest any software readers still check out the other blog about threads. There is a lot of confusion, even among us software professionals.

Advanced Computer Concepts For The (Not So) Common Chef: Introduction

While talking to a very intelligent but non-engineer colleague, I found myself needing to explain the threading and other components of the Intel® Xeon Phi™ ⅹ100 and ⅹ200 architectures. The first topic that came up was hyper-threading, and more specifically, the coprocessor’s version of hyper-threading. Wracking my brain, I finally hit upon an analogy that seemed to suit: the common kitchen.

Intel® Xeon Phi™ Coprocessor – Applications and Solutions Catalog


The PDF document attached to this article contains a growing list of available, downloadable or work-in-progress code that can be run, or actively being optimized to run on Intel® Xeon Phi™ Coprocessors. 

  • Xeon Phi
  • Intel Xeon Phi Coprocessor
  • Knights Corner
  • Knights Landing
  • MIC
  • High performance computing
  • HPC
  • HPC applications
  • Parallel Programming
  • sample code
  • application modernization
  • application optimization
  • Arquitetura Intel® Many Integrated Core
  • Hybrid MPI and OpenMP* Model

    In the High Performance Computing (HPC) area, parallel computing techniques such as MPI, OpenMP*, one-sided communications, shmem, and Fortran coarray are widely utilized. This blog is part of a series that will introduce the use of these techniques, especially how to use them on the Intel® Xeon Phi™ coprocessor. This first blog discusses the main usage of the hybrid MPI/OpenMP model.

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