Composer XE C++ Intel®

The Chronicles of Phi - part 1 The Hyper-Thread Phalanx

The term phalanx is derived from a military formation used by the ancient Greeks and Romans. The formation generally involved soldiers lining up shoulder to shoulder, shield to shield multiple rows deep. The formation would advance in unison becoming “an irresistible force.” I use the term Hyper-Thread Phalanx to refer to the Hyper-Thread siblings of a core being aligned shoulder-to-shoulder and advancing forward.

Error when using compilervars.csh/ippvars.csh - arch: Undefined variable.

Reference number: DPD200253488

Products: Intel® C++ Composer XE, Intel® Integrated Performance Primitives for Linux*

Version: 2013 SP1 Update 2 (compiler 14.0), IPP 8.1 (Initial Release)

Operating Systems: Linux* / IA-32, Intel® 64

Problem Description:

A defect exists in the Intel® Integrated Performance Primitives (IPP) 8.1 Initial release in the ippvars.csh file distributed for Linux* (found under: /opt/intel/composer_xe_2013_sp1/ipp).

  • Desenvolvedores
  • Linux*
  • C/C++
  • Composer XE C++ Intel®
  • Primitivas Intel® Integrated Performance
  • Ferramentas de desenvolvimento
  • simple cilk_spawn Segmentation Fault

    I'm having difficulty running a simple test case using cilk_spawn.  I'm compiling under gcc 4.9.0 20130520.

    The following fib2010.cpp example, executes in 0.028s without cilk and takes 0.376s with cilk as long as I set the number of workers to 1.  If I change the number of workers to any number greater than one, I get a segmentation fault.

    Intel® C++ Composer XE 2013 SP1 for Windows*, Update 2

    Intel® C++ Composer XE 2013 SP1 Update 2 includes the latest Intel C/C++ compilers and performance libraries for IA-32 and Intel® 64 architecture systems. This new product release now includes: Intel® C++ Compiler XE Version 14.0.2 Intel® Math Kernel Library (Intel® MKL) Version 11.1 Update 2, Intel® Integrated Performance Primitives (Intel® IPP) Version 8.1, Intel® Threading Building Blocks (Intel® TBB) Version 4.2 Update 3, Intel(R) Debugger Extension 1.0 Update 1 for Intel(R) Many Integrated Core Architecture.

    New in this release:

  • Desenvolvedores
  • Microsoft Windows* (XP, Vista, 7)
  • Microsoft Windows* 8
  • C/C++
  • Compilador C++ Intel®
  • Composer XE C++ Intel®
  • Intel® Composer XE
  • Depurador Intel®
  • Primitivas Intel® Integrated Performance
  • Biblioteca kernel de matemática Intel®
  • Módulos de sub-rotinas Intel®
  • How can I parallelize implicit loop ?

    I have the loop, inside its body running the function with array member (dependent on loop index) as an argument, and returning one value.
    I can parallelized this loop by using cilk_for() operator instead of regular for() - and it is simple and works well.  This is explicit parallelization.  
    Instead of explicit loop instruction I can use Array Notation contruction (as shown below) - it is implicit loop.
    My routine is relatively long and complecs, and has Array Notation constructions inside, so it cannot be declared as a vector (elemental) one.

    Patches or configure options to build the trunk on arm

    Hello, 

    I want to build the trunk on an embedded system supporting armv7 instructions. The build was accomplished without errors but cilk/cilk.h and libcilkrts weren't built. I checked out the patches available on the internet they do support non x86 architectures but I think just i386 not arm.

    Are there other patches or config options to add while building so that I get those libraries along with the build 

    Regards   

    Assine o Composer XE C++ Intel®