Intel® Many Integrated Core Architecture (Intel MIC Architecture)

Troubleshooting HOWTO: Bad hardware? MPSS? Configuration?

Are you having problems with your hardware (Cannot see your Intel(R) Xeon Phi(tm) coprocessor?  Sporadic accessibility?) or with the Intel(R) Manycore Platform Software Stack (Intel(R) MPSS) running reliably?

Attached to this post are PDF "flowcharts" that explain how you can troubleshoot the problem (note:  Both Linux and Windows flowcharts are available), and shows what information you will want to collect if you need to escalate your issue to your OEM provider or Intel.

What collateral/documentation do you want to see?

Do you have questions that you are not finding the answers for in our documentation?  Need more training, source code examples, on what specifically?   Help us understand what's missing so that we can make sure we develop documentation you care about (what is important, and what is nice to have)!   Thank you

FAQS: Compilers, Libraries, Performance, Profiling and Optimization.

In the period prior to the launch of Intel® Xeon Phi™ coprocessor, Intel collected questions from developers who had been involved in pilot testing. This document contains some of the most common questions asked. Additional information and Best-Known-Methods for the Intel Xeon Phi coprocessor can be found here.

The Intel® Compiler reference guides can be found at:

CentOS 7 + MPSS 3.4.x + OFED 3.1x: Bug in ibp_server?


I'm currently in the process of setting up the OS for a diskless cluster with two Xeon Phi Cards per host.

Currently working with CentOS 7.0, MPSS 3.4.3, OFED 3.12-1 and Lustre 2.7.0.

Installation and booting host and two Xeon Phis works fine so far, except that as soon as I try load Lustre (using o2ib) on the second Xeon Phi the complete system crashes due to an error within the ibp_server module (logs can be found a. Using only one Xeon Phi lustre works fine, including mount over Infiniband.

Regarding intel MIC offload error: buffer write failed

I am trying to explore the code offloading construct .In the following program
 the offloaded region fetches the architecture of MIC card.
void main()
  FILE *fp,*fp1;
 char data[100],data1[100],final[100];
#pragma offload target(mic: 0) inout(data , fp)
	fp=popen("uname -m","r");
	fread(data, sizeof(char),100 , fp);
Here are three sample runs of this program:
  • The first run succeeds ,
Assine o Intel® Many Integrated Core Architecture (Intel MIC Architecture)