Intel® Atom™ Processors support in the Intel® Integrated Performance Primitives (Intel® IPP) Library

All versions of the Intel® IPP library will run on Intel® Atom™ processors. The table below represents the Intel IPP library functions that have been "hand-tuned" for optimal performance on Intel Atom processors in version 7.0.2 of the library.

Hand-tuned optimizations designed to maximize performance of the Intel IPP library on Intel Atom processors were added beginning with v6.0 of the Intel IPP library. For maximum performance on Intel Atom processors, we recommend that you upgrade to version 7.0 of the Intel IPP library.

Both static and dynamic/shared libraries in v7.0 of the Intel IPP library include Intel Atom processor optimizations. Applications linked with versions 7.0 of the Intel IPP library will be dispatched to the "s8" optimized library for IA-32 and the "n8" library for Intel® 64 whenever your application executes on an Intel Atom processor.

For more information regarding dispatching please see Understanding CPU Dispatching in the Intel® IPP Library or check the Intel IPP Getting_Started.htm and userguide_*.pdf files in the Intel IPP documentation.

In the v6.x Intel IPP library, only the dynamic/shared libraries contain Intel Atom processor optimizations; there are no Intel Atom processor optimizations in the v6.x dispatched static libraries. However, the v6.x dispatched static libraries will safely run on an Intel Atom processor by dispatching to the v8/u8 libraries optimized for the Merom microarchitecture (Intel Core 2 processor), which is also designed for use with the same Intel Supplemental SSE3 SIMD instruction set (SSSE3) that Intel Atom processors support. A separate non-dispatched static Intel IPP library for Linux* is available on the IA-32 platform (and as part of the Intel Atom SDK).

The following list of functions have been hand-optimized for the Intel Atom processor for the version of the Intel IPP library listed at the beginning of this article.

Note: every Intel IPP library primitive is available for use with the Intel Atom processor, this list simply shows those functions which have been specially hand-tuned for the Intel Atom processor; hand-tuning is not required to achieve optimum performance for all IPP functions. If you have some specific Intel IPP functions that are not listed in the following table, and would like to see them added to the priority list for Atom optimization, please create a thread on the IPP forum stating which functions you would like to see added to the Atom optimization priority list.

Signal Processing

ippsAddProduct_32f
ippsAddProduct_32fc
ippsAddProduct_32s_Sfs
ippsAddProduct_64f
ippsAddProduct_64fc
ippsAdd_32f    
ippsAdd_32fc   
ippsAdd_64f    
ippsAdd_64fc
ippsAdd_32f_I
ippsAdd_32fc_I
ippsAdd_32s_Sfs
ippsConvert_16s32f
ippsConvert_16u32f
ippsConvert_32f16s_Sfs
ippsConvert_32f16u_Sfs
ippsConvert_32f32s_Sfs
ippsConvert_32f8s_Sfs
ippsConvert_32f8u_Sfs
ippsConvert_32s32f
ippsConvert_32s64f
ippsConvert_64f32s_Sfs
ippsConvert_8s32f
ippsConvert_8u32f
ippsCopy_16s
ippsCopy_64s
ippsDFTFwd_CToC_32fc
ippsDFTFwd_CToC_64fc
ippsDiv_16sc_Sfs
ippsDiv_16s_Sfs
ippsDiv_16u_Sfs
ippsDiv_32f
ippsDiv_32fc
ippsDiv_32s16s_Sfs
ippsDiv_32s_Sfs
ippsDiv_64f
ippsDiv_64fc
ippsDotProd_32f32fc64fc
ippsDotProd_32f64f
ippsDotProd_32fc64fc
ippsDotProd_64f
ippsDotProd_64f64fc
ippsDotProd_64fc
ippsFFTFwd_CToC_32fc
ippsFFTFwd_CToC_64fc
ippsFilterMedian_32f
ippsFilterMedian_32s
ippsFilterMedian_64f
ippsFIR32f_16s_Sfs
ippsFIR64f_16s_Sfs
ippsFIR64f_32s_Sfs
ippsFIR_32f
ippsFIR_64f
ippsJoin_32f16s_D2L
ippsLShiftC_32s_I
ippsMax_32s
ippsMean_32f
ippsMin_32s
ippsMul_32f       
ippsMul_32fc      
ippsMul_64f       
ippsMul_64fc
ippsMul_32f_I
ippsMulC_32f
ippsMulC_32f_I
ippsNorm_L2_32f
ippsNormDiff_L2_32f
ippsRShiftC_32s_I
ippsSampleUp_32f
ippsScale_32f_I
ippsSqr_32f
ippsSqr_32f_I
ippsSqr_32fc
ippsSqr_64f
ippsSqr_64fc
ippsSqrt_16s_Sfs
ippsSqrt_16u_Sfs
ippsSqrt_32f
ippsSqrt_32f_I
ippsSqrt_32fc
ippsSqrt_64f
ippsSqrt_64fc
ippsSub_32s_Sfs
ippsSub_32f       
ippsSub_32f_I
ippsSub_32fc      
ippsSub_64f       
ippsSub_64fc      
ippsSum_32f
ippsSum_32f
ippsThreshold_LTVal_32f_I

 

Speech Coding

ippsAdaptiveCodebookSearch_RTA_32f
ippsSBADPCMEncode_G722_16s
ippsSBADPCMDecode_G722_16s
ippsDCTFwd_G7221_16s
ippsDCTInv_G7221_16s
ippsDecomposeDCTToMLT_G7221_16s
ippsDecomposeMLTToDCT_G7221_16s
ippsEnvelopFrequency_G7291_16s
ippsFilterHighpass_G7291_16s
ippsFilterLowpass_G7291_16s
ippsFIRSubbandLow_EC_32sc_Sfs
ippsFIRSubbandLowCoeffUpdate_EC_32sc_I
ippsFixedCodebookSearch_RTA_32f
ippsFixedCodebookSearchRandom_RTA_32f
ippsLSPToLPC_RTA_32f
ippsLSPQuant_RTA_32f
ippsMDCTFwd_G7291_16s
ippsMDCTPostProcess_G7291_16s
ippsQMFDecode_G722_16s
ippsQMFDecode_G7291_16s
ippsQMFEncode_G722_16s
ippsQMFEncode_G7291_16s
ippsSubbandAnalysis_16s32sc_Sfs
ippsSubbandController_EC_32f
ippsSubbandControllerUpdate_EC_32f
ippsSubbandSynthesis_32sc16s_Sfs
ippsTiltCompensation_G7291_16s
ippsToeplizMatrix_G729_32f
ippsToneDetect_EC_32f

 

Data Compression

ippsCRC32_8u
ippsEncodeRLE_BZ2_8u
ippsReduceDictionary_8u_I
ippsVLCCountBits_16s32s
ippsVLCDecodeOne_1u16s
ippsVLCDecodeUTupleBlock_1u16s
ippsVLCDecodeUTupleOne_1u16s
ippsVLCEncodeInit_32s

 

Audio Coding

ippsMDCTInvWindow_MP3_32s
ippsPow43Scale_16s32s_Sf
ippsPow43_16s32f
ippsPredictCoef_SBR_C_32fc_D2L
ippsSynthesisDownFilter_SBR_CToR_32fc32f_D2L
ippsSynthesisDownFilter_SBR_RToR_32f_D2L
ippsSynthesisFilter_PQMF_MP3_32f
ippsSynthesisFilter_SBR_CToR_32fc32f_D2L
ippsSynthesisFilter_SBR_RToR_32f_D2L
ippsVLCDecodeEscBlock_AAC_1u16s
ippsVLCDecodeEscBlock_MP3_1u16s
ippsVLCDecodeUTupleEscBlock_AAC_1u16s
ippsVLCDecodeUTupleEscBlock_MP3_1u16s

 

Image Processing

ippiAdd_16s_C1IRSfs
ippiConvert_16u32f_C1R 
ippiConvert_16u8u_C3R 
ippiConvert_8u16s_C1R
ippiConvert_8u16u_C1R 
ippiCopyReplicateBorder_16s_C1R
ippiCopy_8u_C1R 
ippiCopy_8u_C3R 
ippiCopy_8u_C4R 
ippiDilate_32f_AC4R 
ippiDilate_32f_C1R 
ippiDilate_32f_C3R 
ippiDiv_16s_AC4RSfs 
ippiDiv_16s_C1RSfs 
ippiDiv_16s_C3RSfs 
ippiDiv_16s_C4RSfs 
ippiDiv_16u_AC4RSfs 
ippiDiv_16u_C1RSfs 
ippiDiv_16u_C3RSfs 
ippiDiv_16u_C4RSfs 
ippiDiv_32f_AC4R 
ippiDiv_32f_C1R 
ippiDiv_32f_C3R 
ippiDiv_32f_C4R 
ippiErode_32f_AC4R 
ippiErode_32f_C1R 
ippiErode_32f_C3R 
ippiFilter32f_8u_AC4R
ippiFilter32f_8u_C1R 
ippiFilter32f_8u_C3R 
ippiFilter32f_8u_C4R 
ippiFilterGauss_16s_AC4R 
ippiFilterGauss_16s_C1R 
ippiFilterGauss_16s_C3R 
ippiFilterGauss_16s_C4R 
ippiFilterGauss_32f_AC4R 
ippiFilterGauss_32f_C1R 
ippiFilterGauss_32f_C3R 
ippiFilterGauss_32f_C4R 
ippiFilter_16s_AC4R 
ippiFilter_16s_C1R 
ippiFilter_16s_C3R 
ippiFilter_16s_C4R 
ippiFilter_16u_AC4R 
ippiFilter_16u_C1R 
ippiFilter_16u_C3R 
ippiFilter_16u_C4R 
ippiFilter_8u_AC4R 
ippiFilter_8u_C1R 
ippiFilter_8u_C3R 
ippiFilter_8u_C4R 
ippiGetPerspectiveQuad
ippiMirror_16u_C1IR
ippiMirror_16u_C4R 
ippiMirror_32s_C4R 
ippiMirror_8u_C4R 
ippiMul_32f_AC4R 
ippiMul_32f_C1R 
ippiMul_32f_C3R 
ippiMul_32f_C4R 
ippiSet_16u_C3R 
ippiSet_16u_C4R 
ippiSet_32f_C1R 
ippiSet_32f_C3R 
ippiSet_8u_C3R 
ippiSet_8u_C4R 
ippiSqrt_16s_AC4RSfs 
ippiSqrt_16s_C1RSfs 
ippiSqrt_16s_C3RSfs 
ippiSqrt_16u_AC4RSfs 
ippiSqrt_16u_C1RSfs 
ippiSqrt_16u_C3RSfs 
ippiSqrt_32f_AC4R 
ippiSqrt_32f_C1R 
ippiSqrt_32f_C3R 
ippiSqr_32f_AC4R 
ippiSqr_32f_C1R 
ippiSqr_32f_C3R 
ippiSqr_32f_C4R 
ippiSub_16s_C1IRSfs

 

Color Conversion

ippiBGR555ToYCbCr420_16u8u_C3P3R
ippiBGR555ToYCbCr422_16u8u_C3C2R
ippiBGR555ToYCbCr422_16u8u_C3P3R
ippiBGR555ToYCrCb420_16u8u_C3P3R
ippiBGR555ToYUV420_16u8u_C3P3R
ippiBGR565ToYCbCr411_16u8u_C3P3R
ippiBGR565ToYCbCr420_16u8u_C3P3R
ippiBGR565ToYCbCr422_16u8u_C3C2R
ippiBGR565ToYCbCr422_16u8u_C3P3R
ippiBGR565ToYCrCb420_16u8u_C3P3R
ippiBGR565ToYUV420_16u8u_C3P3R
ippiBGRToCbYCr422_8u_AC4C2R
ippiBGRToHLS_8u_AC4P4R
ippiBGRToHLS_8u_AP4C4R
ippiBGRToHLS_8u_AP4R
ippiBGRToHLS_8u_C3P3R
ippiBGRToHLS_8u_P3C3R
ippiBGRToHLS_8u_P3R
ippiBGRToYCbCr422_8u_AC4C2R
ippiBGRToYCbCr422_8u_AC4P3R
ippiBGRToYCbCr422_8u_C3C2R
ippiBGRToYCbCr422_8u_C3P3R
ippiCbYCr422ToBGR_8u_C2C4R
ippiHLSToBGR_8u_AC4P4R
ippiHLSToBGR_8u_AP4C4R
ippiHLSToBGR_8u_AP4R
ippiHLSToBGR_8u_C3P3R
ippiHLSToBGR_8u_P3C3R
ippiHLSToBGR_8u_P3R
ippiRGB565ToYUV422_16u8u_C3P3R
ippiRGBToCbYCr422Gamma_8u_C3C2R
ippiRGBToCbYCr422_8u_C3C2R
ippiRGBToYCbCr422_8u_C3C2R
ippiRGBToYCbCr422_8u_C3P3R
ippiRGBToYCbCr_8u_P3R
ippiRGBToYCrCb422_8u_P3C2R
ippiRGBToYUV420_8u_P3
ippiRGBToYUV420_8u_P3R
ippiRGBToYUV422_8u_C3C2R
ippiRGBToYUV422_8u_C3P3
ippiRGBToYUV422_8u_C3P3R
ippiRGBToYUV422_8u_P3
ippiRGBToYUV422_8u_P3R
ippiRGBToYUV_8u_AC4R
ippiRGBToYUV_8u_C3R
ippiRGBToYUV_8u_P3R
ippiYCbCr422To420_Interlace_8u_P3R
ippiYCbCr422ToBGR_8u_C2C3R
ippiYCbCr422ToBGR_8u_C2P3R
ippiYCbCrToRGB_8u_P3R
ippiYUV422ToRGB_8u_P3C3
ippiYUV422ToRGB_8u_P3C3R
ippiYUVToRGB_8u_P3C3R

 

Video Coding

ippiReconstructLumaIntra4x4_H264High_32s16u_IP1R
ippiFilterDeblockingLumaVerEdge_H264_16u_C1IR
ippiFilterDeblockingLumaHorEdge_H264_16u_C1IR

 

Miscellaneous

ippsFindCAny_8u
ippmInvert_m_32f
ippmMul_tm_32f

 


Functions not listed above are either hand-optimized for the Merom microarchitecture (SSSE3) or for prior SIMD instruction sets that are compatible with the Intel Atom processor (such as SSE2). In addition, the entire Intel Atom optimized library is compiler-optimized for the Intel Atom processor using the Intel Compiler xSSE3_ATOM switch (enable Atom optimizations) in order to take advantage of features unique to the Intel Atom processor.

Please see Optimized for the Intel® Atom™ Processor with Intel's Compiler for more information and check out the Intel Parallel Studio web site where you can learn more about the tools available to develop, debug, and tune your multi-threaded applications.

Optimization Notice in English

Для получения подробной информации о возможностях оптимизации компилятора обратитесь к нашему Уведомлению об оптимизации.