MICRO48-Tutorial on Intel® Processor Graphics: Architecture and Programming

Intel Processor Graphics: Architecture and Programming

Organizers: David Blythe, Hong Jiang, Stephen Junkins, Geoff Lowney, Ken Lueh, CK Luk (all from Intel)

Email: {david.blythe, hong.h.jiang, stephen.junkins, geoff.lowney, guei-yuan.lueh, chi-keung.luk}@intel.com

Duration: Full Day

Slides now available: Architecture partCompiler part, Programming part.

Abstract

Intel Processor Graphics is a power-efficient, high performance graphics and media accelerator integrated on-die with the Intel CPU.    It is the graphics processor in the majority of desktops and laptops.   The integrated GPU shares the last-level cache with the CPU, which permits fine-grained, coherent data sharing at low latency and high bandwidth.   On-die integration enables much lower power consumption than a discrete graphics card.   Performance of the GPU approaches a teraflop.  

In this tutorial, we will give an in-depth presentation of the architecture and micro-architecture of the media and graphics accelerator.  We will explain the tradeoff between general purpose compute and hardware fixed functions.  We will discuss the advantages and disadvantages of on-die integration.   We will present the various programming models that are supported.  We will present some examples of non-graphics workloads and discuss how they are mapped to hardware.  The tutorial has four parts.  Part one will focus on the micro architecture of Intel Processor Graphics, part two will present the system architecture, part three will discuss how to program it, and part four will present some examples.

Outline

Morning Sessions:

  1. Microarchitecture
    1. Overview
    2. Programmable cores
    3. Fixed functions
    4. Cache hierarchy
  2. System architecture
    1. SoC architecture
    2. Ring interconnect
    3. Shared LLC
    4. Optional EDRAM

Afternoon Sessions:

  1. Programming
    1. Programming models supported
    2. Shared virtual memory
    3. The Intel Graphics Compiler
    4. Tools (Profilers, Debuggers, Simulators)
  2. Compute-workload examples
    1. OpenCL
    2. C++
    3. Commercial

 

Biographies of Organizers

David Blythe is an Intel Fellow for the Platform Engineering Group and chief graphics software architect for the Visual and Parallel Computing Group at Intel Corporation. He leads the development of advanced features and application programming interfaces (APIs) for Intel's processor graphics products, as well as the software architecture for Intel's processor graphics and Xeon Phi architectures.

Hong Jiang is an Intel Fellow and the chief media architect for the Platform Engineering Group and director of the Visual and Parallel Computing Group's Media Architecture Team at Intel Corporation. He leads the media architecture of processor graphics and its derivatives, including the definition of media hardware and software assets and the group's technology roadmap.

Stephen Junkins is a principal engineer and architect for graphics and compute in Intel’s Visual & Parallel Computing group.  Stephen’s work has spanned GPU computing, GPU APIs, multi-resolution 3D meshes, interactive subdivision surface rendering, software rasterization, radiosity based global illumination, and parallel computing.  Prior to Intel, Stephen worked for Siemens Medical Imaging and the Los Alamos National Labs.   He holds over a dozen patents and BS and MS degrees in computer science from Clemson University.

P. Geoffrey Lowney is an Intel Senior Fellow in the Software and Services Group and serves as chief technology officer for the Developer Products Division at Intel Corporation. He directs the development of compilers, run-time systems and programming tools for Intel platforms.

Ken Lueh is a Senior Principal Engineer in the Visual and Parallel Computing Group at Intel. He is the chief architect of the new Intel Graphics Compiler.

CK Luk is a Principal Engineer in the Software and Services Group at Intel, currently focusing on GPU programming tools. He received an ACM SIGPLAN Most Influential PLDI paper award, an Intel achievement award, and a nomination for the ACM Doctoral Dissertation award.

 

 

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