Horizontally adds adjacent signed packed 16/32-bit integer data elements of two vectors. The corresponding Intel® AVX2 instruction is VPHADDW or VPHADDD.

Syntax

extern __m256i _mm256_hadd_epi16(__m256i s1, __m256i s2);

extern __m256i _mm256_hadd_epi32(__m256i s1, __m256i s2);

Arguments

s1

integer source vector used for the operation

s2

integer source vector used for the operation

Description

Adds two adjacent 16- or 32-bit signed integers horizontally from source vectors, s1 and s2 and packs the 16 or 32-bit signed results to the destination vector.

Horizontal addition of two adjacent data elements of the low 16- or 32-bytes of the first and second source vectors are packed into the low 16- or 32-bytes of the destination vector. Horizontal addition of two adjacent data elements of the high 16- or 32-bytes of the first and second source vectors are packed into the high 16- or 32-bytes of the destination vector.

Returns

Result of the horizontal addition operation.

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