Archived - Coding for 2 at Once - Intel RealSense User Facing Cameras

Making applications with Intel RealSense technology compatible with multiple generations of Intel RealSense 3D Cameras (F200 and SR300)
Автор: Последнее обновление: 30.05.2018 - 07:00

Optimizing Memory Bandwidth in Knights Landing on Stream Triad

This document demonstrates the best methods to obtain peak memory bandwidth performance on Intel® Xeon Phi™ Processor (codenamed Knights Landing). This is done using STREAM* benchmarks, the de facto industry-standard benchmark for the measurement of computer memory bandwidth.
Автор: Karthik Raman (Intel) Последнее обновление: 29.07.2019 - 07:59

Recipe: Optimized Caffe* for Deep Learning on Intel® Xeon Phi™ processor x200

The computer learning code Caffe* has been optimized for Intel® Xeon Phi™ processors. This article provides detailed instructions on how to compile and run this Caffe* optimized for Intel® architecture to obtain the best performance on Intel Xeon Phi processors.
Автор: Vamsi Sripathi (Intel) Последнее обновление: 21.03.2019 - 12:40

Recipe: Building and Running MILC on Intel® Xeon® Processors and Intel® Xeon Phi™ Processors

MILC software represents a set of codes written by the MIMD Lattice Computation collaboration used to study quantum chromodynamics. This article provides instructions for code access, build and run directions for the “ks_imp_rhmc” application on Intel® Xeon® Gold and Intel® Xeon Phi™ processors for better performance on a single node.
Автор: Smahane Douyeb. (Intel) Последнее обновление: 14.06.2019 - 11:50