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Intel® Platform Analysis Library Metrics Framework Release Notes

Click "Download Now" below to obtain and view Intel® Platform Analysis Library Metrics Framework release notes.

Автор: Последнее обновление: 23.06.2019 - 18:50
Article

Analyzing Intel® SDE's TSX-related log data for capacity aborts

Starting with version 7.12.0, Intel® SDE has Intel® TSX-related instruction and memory access logging features which can be useful for debugging Intel® TSX's capacity aborts.

Автор: Последнее обновление: 06.07.2019 - 10:52
Article

Intel® INDE OpenCV - Release Notes

The Intel® Integrated Native Developer Experience (Intel® INDE) suite has been discontinued.

Автор: Последнее обновление: 18.09.2018 - 14:30
Article

Debug SPI BIOS after Power Up Sequence

Describe how to halt CPU core, after power up sequence including CPU reset deassertion, to read/display SPI BIOS
Автор: Kan Hayashi (Intel) Последнее обновление: 03.07.2019 - 10:26
Блоги

The Core Software Strategy - 9 Years Old and Still True!

I can safely predict that if you are a developer, you are looking for ways to get your job done faster. Get working code quicker, find bugs faster, take advantage of new technologies and get working performance as smoothly as possible. This is why the saying "steal with pride" comes up --it's a well-worn technique to borrow or adopt code where you can. (Of course, I'm not saying you would commit...
Автор: David S. (Blackbelt) Последнее обновление: 23.06.2019 - 19:10
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Core Challenge In Speeding Up Python, PHP, HHVM, Node.js...

A traditional compiler translates a high-level computer program into machine code for the CPU you want to run it on. An interpreted language translates a high-level language into the machine code for some imaginary CPU. For historical reasons, this imaginary CPU is called a "virtual machine" and its instructions are called "byte code." One advantage of this approach is development speed: creating...
Автор: David S. (Blackbelt) Последнее обновление: 04.07.2019 - 20:00
Article

Palestra: Como otimizar seu código sem ser um "ninja" em Computação Paralela

Não perca a palestra "Como otimizar seu código sem ser um "ninja" em Computação Paralela" da Intel que será ministrada durante a Semana sobre Programação Massivamente Paralela em Petrópolis, RJ, no Laboratório Nacional de Computação Científica. Data: 02/02/2016 - 11h30 Local: LNCC - Av. Getúlio Vargas, 333 - Quitandinha - Petrópolis/RJ
Автор: Igor F. (Intel) Последнее обновление: 06.07.2019 - 16:40
Блоги

Announcing the Intel® Distribution for Python* Beta

The Beta for Intel® Distribution for Python* 2017 has been available for 1 month and I wanted to share some of our experiences.

Автор: Robert C. (Intel) Последнее обновление: 31.12.2018 - 16:12
Блоги

Celebrating a Decade of Parallel Programming with Intel® Threading Building Blocks (Intel® TBB)

This year marks the tenth anniversary of Intel® Threading Building Blocks (Intel® TBB).

Автор: Sharmila C. (Intel) Последнее обновление: 01.08.2019 - 09:30
Article

Using Intel® Data Analytics Acceleration Library to Improve the Performance of Naïve Bayes Algorithm in Python*

This article discusses machine learning and describes a machine learning method/algorithm called Naïve Bayes (NB) [2]. It also describes how to use Intel® Data Analytics Acceleration Library (Intel® DAAL) [3] to improve the performance of an NB algorithm.
Автор: Nguyen, Khang T (Intel) Последнее обновление: 06.07.2019 - 16:40