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Intel® Cluster Ready Recipes for StackIQ

Intel® Cluster Ready “recipes” are reference designs provided to help hardware vendors, platform integrators, and system integrators design and build certified Intel Cluster Ready systems. This is a list of all recipes featuring the StackIQ Rocks+* suite.
Автор: админ Последнее обновление: 28.03.2019 - 08:48
Article

Intel® Cluster Ready Recipes for Platform Computing*

Intel® Cluster Ready “recipes” are reference designs provided to help hardware vendors, platform integrators, and system integrators design and build certified Intel Cluster Ready systems. This is a list of all recipes featuring the Platform* suite.
Автор: админ Последнее обновление: 28.03.2019 - 08:48
Article

Intel® Cluster Ready Recipes for OSCAR-Pro*

Intel® Cluster Ready “recipes” are reference designs provided to help hardware vendors, platform integrators, and system integrators design and build certified Intel Cluster Ready systems. This is a list of all recipes featuring the OSCAR-Pro* suite.
Автор: админ Последнее обновление: 28.03.2019 - 08:48
Документация

Intel® Math Kernel Library Cookbook в Intel® Math Kernel Library Cookbook

Последнее обновление: 28.05.2018 - 23:50
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Archived - Coding for 2 at Once - Intel RealSense User Facing Cameras

Making applications with Intel RealSense technology compatible with multiple generations of Intel RealSense 3D Cameras (F200 and SR300)
Автор: Последнее обновление: 30.05.2018 - 07:00
Article

Optimizing Memory Bandwidth in Knights Landing on Stream Triad

This document demonstrates the best methods to obtain peak memory bandwidth performance on Intel® Xeon Phi™ Processor (codenamed Knights Landing). This is done using STREAM* benchmarks, the de facto industry-standard benchmark for the measurement of computer memory bandwidth.
Автор: Karthik Raman (Intel) Последнее обновление: 21.03.2019 - 12:00
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Recipe: Using Binomial Option Pricing Code as Representative Pricing Derivative Method

Introduction
Автор: Последнее обновление: 21.03.2019 - 12:08
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Recipe: Pricing Options Using Barone-Adesi Whaley Approximation

In this paper, we look at one of the successful efforts, pioneered by Barone-Adesi and Whaley, and apply the high performance parallel computing entailed in the modern microprocessors to create a program that can exceed our expectation for high performance with a suitable numerical result.
Автор: админ Последнее обновление: 21.03.2019 - 12:00
Article

Recipe: Optimized Caffe* for Deep Learning on Intel® Xeon Phi™ processor x200

The computer learning code Caffe* has been optimized for Intel® Xeon Phi™ processors. This article provides detailed instructions on how to compile and run this Caffe* optimized for Intel® architecture to obtain the best performance on Intel Xeon Phi processors.
Автор: Vamsi Sripathi (Intel) Последнее обновление: 21.03.2019 - 12:40