Видео

The Advantages of Intel® Fortran Compiler with Intel® Xeon® & the Intel® Xeon Phi™ Coprocessor

Steve Lionel, Dr Fortran, talks about how Intel® Compilers 

Автор: Gerald M. (Intel) Последнее обновление: 14.06.2019 - 15:31
Article

Further Vectorization Features of the Intel® Compiler - Webinar Code Samples

The code samples for the webinar "Further Vectorization Features of the Intel® Compiler" given on 4/7/2015 are attached below.

Автор: Martyn Corden (Intel) Последнее обновление: 11.07.2018 - 19:21
Видео

Using Nested Parallelism in OpenMP*

Multi-level parallelism with OpenMP* deserves your consideration—even if you've rejected it in the past. OpenMP nesting is turned off by default by most implementations.

Автор: JEONGNIM K. (Intel) Последнее обновление: 12.12.2018 - 18:08
Article

IDF15 - Webcast: Code Modernization Best Practices

Intel® Xeon® and Intel® Xeon Phi™ processor based platforms provide multiple levels of parallel execution resources. The amount of compute power of these resources is growing with every product generation, yet most applications do not fully utilize the available computing resources. This session will provide details on the growth in hardware resources and characterize performance using different...
Автор: Последнее обновление: 06.07.2019 - 11:37
Видео

Vector-Parallel Code Modernization Webinar

Learn how to optimize some difficult loops with Intel® compilers for Fortran*, C, and C++.

Автор: Tim P. (Blackbelt) Последнее обновление: 12.12.2018 - 18:08
Видео

Effective Parallel Optimizations with the Intel® Fortran Compiler

The SIMD and multi-core features of modern processors enable large improvements in application performance―but only if the application is effectively optimized for parallel execution.

Автор: Martyn Corden (Intel) Последнее обновление: 10.06.2019 - 09:40
Видео

Knights Landing – An Overview for Developers

In this webinar, James Reinders, will cover the essential knowledge needed for effectively utilizing the extraordinary parallelism in the new Intel® Xeon Phi™ processor (code named Knights Landing)

Автор: админ Последнее обновление: 21.03.2019 - 12:08
Видео

Code for Speed with High Bandwidth Memory on Intel® Xeon Phi™ Processors

The Intel’s 2nd generation Xeon Phi™ processor family x200 product (code-name Knights Landing) brings in new memory technology, a high bandwidth on package memory called Multi-Channel DRAM (MCDRAM)

Автор: админ Последнее обновление: 14.06.2019 - 15:27
Видео

Vectorization: The “Other” Parallelism You Need

We will describe, with C and Fortran examples, new opportunities for performance-enhancing vectorization provided by the Intel® AVX-512 instruction set on the processor code named Knights Landing.

Автор: админ Последнее обновление: 21.03.2019 - 12:08