Tips and techniques on using the Intel® Compilers to maximize your application performance.
Download page for the latest Intel® Software Development Emulator
Intel® Compiler - How can I generate optimized code to run on any IA-32 or Intel®64 architecture processor?Some frequently used optimization switches of the Intel Compiler are described
This page contains common questions and answers on multi-threading in the Intel IPP.
Lists all supported CPUs and identifiers used in Intel® Integrated Performance Primitives (Intel® IPP).
Information about Intel® Integrated Performance Primitives (Intel® IPP) memory functions
Performance Tools for Software Developers - SSE generation and processor-specific optimizations continuedCan I combine the processor values and target more than one processor? How to generate optimized code for both Intel and AMD* architecture? Where can I find more information on processor-specific optimizations?
Loop blocking is a combination of strip mining and loop interchange to enhance reuse of local data. It helps the nested loops that manipulate arrays and are too large to fit into the cache. The loop blocking allows reuse of the arrays by transforming the
The article describes effect of /Qpar-threshold option when doing auto parallelization with Intel C++ compiler.