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Intel® Software Development Emulator

Product overview for the Intel® Software Development Emulator or Intel® SDE
Автор: Ady Tal (Intel) Последнее обновление: 26.03.2019 - 07:07
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Intel® Software Development Emulator Download

Download page for the latest Intel® Software Development Emulator
Автор: Ady Tal (Intel) Последнее обновление: 03.07.2019 - 20:00
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Exploring Intel® Transactional Synchronization Extensions with Intel® Software Development Emulator

Intel® Transactional Synchronization Extensions (Intel® TSX) is perhaps one of the most non-trivial extensions of instruction set architecture introduced in the 4th generation Intel® Cor

Автор: Roman Dementiev (Intel) Последнее обновление: 06.07.2019 - 17:00
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Intel® Transactional Synchronization Extensions (Intel® TSX) profiling with Linux perf

Intel® TSX exposes a speculative execution mode to the programmer to improve locking performance.. Tuning speculation requires heavily on a PMU profiler.

Автор: Andreas Kleen (Intel) Последнее обновление: 04.07.2019 - 17:00
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Using HLE and RTM with older compilers with tsx-tools

To use HLE/RTM to improve lock scalability the lock library needs to be enabled.

Автор: Andreas Kleen (Intel) Последнее обновление: 14.06.2017 - 13:26
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Monitoring Intel® Transactional Synchronization Extensions with Intel® PCM

After applying a new technology (a new processor, a hardware accelerator, a new instruction, etc) besides measuring the immediate performance delta one requires a method to verify that this technol

Автор: Roman Dementiev (Intel) Последнее обновление: 04.07.2019 - 17:00
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Fun with Intel® Transactional Synchronization Extensions

By now, many of you have heard of Intel® Transactional Synchronization Extensions (Intel® TSX).

Автор: Последнее обновление: 04.07.2019 - 17:00
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Using Intel® SDE's chip-check feature

Intel® SDE includes a software validation mechanism to restrict executed instructions to a part

Автор: Mark Charney (Intel) Последнее обновление: 31.05.2019 - 09:04
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Transactional memory support: the speculative_spin_mutex

Intel recently released the 4th Generation Intel® Core™ processors, which have Intel® Transaction

Автор: Последнее обновление: 28.05.2018 - 18:30
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TSX anti patterns in lock elision code

Lock elision is a new way to scale programs. It requires following some rules for correctness and good performance.

Автор: Andreas Kleen (Intel) Последнее обновление: 07.06.2017 - 10:53