Performance of Multibuffer AES-CBC on Intel® Xeon® Processors E5 v3

This paper examines the impact of the multibuffer enhancements to OpenSSL* on the Intel® Xeon® processor E5 v3 family when performing AES block encryption in CBC mode. It focuses on the performance gains seen by the Apache* web server when managing a large number of simultaneous HTTPS requests using the AES128-SHA and AES128-SHA256 ciphers, and how they stack up against the more modern AES128-GCM-SHA256 cipher.

  • Linux*
  • Сервер
  • Средний
  • OpenSSL
  • Intel® Xeon® Processor
  • Apache*
  • CBC
  • AES128
  • Информационная безопасность
  • AES-GCM Encryption Performance on Intel® Xeon® E5 v3 Processors

    This case study examines the architectural improvements made to the Intel® Xeon® E5 v3 processor family in order to improve the performance of the Galois/Counter Mode of AES block encryption. It looks at the impact of these improvements on the nginx* web server when backed by the OpenSSL* SSL/TLS library. With this new generation of Xeon processors, web servers can obtain significant increases in maximum throughput by switching from AES in CBC mode with HMAC+SHA1 digests to AES-GCM.

  • Разработчики
  • Linux*
  • Сервер
  • Средний
  • Haswell
  • AES
  • Intel® Xeon® E5 v3 Processors
  • OpenSSL
  • Intel® AES-NI
  • Информационная безопасность
  • Meshcentral - Live Stats, WebRTC update, Node.JS...

    It’s been a busy week for the Mesh team with Rick Edgecombe releasing software and taking care of important customers, Bryan Roe working on Intel’s very own WebRTC stack, Kevin Wang making his first software release and ramping up on Mesh Communicator. This week, we have a bunch of new releases:

    How Intel® QuickAssist Technology Accelerates Deep Packet Inspections and other Network Function Use Cases

    Intel® QuickAssist Technology Introduction

    Intel® QuickAssist Technology accelerates and compresses cryptographic workloads by offloading the data to hardware capable of optimizing those functions.  This makes it easier for developers to integrate built-in cryptographic accelerators into network and security applications.

    Encryption/Decryption - invoking OpenSSL API through JNI calls

    This blog outlines the steps needed to integrate Intel’s AES-NI instructions into an Android app via the OpenSSL library. By following the procedures here, you’ll be able to build a JNI application that benefits from AES-NI acceleration.

    New Features in Intel® Active Management Technology (AMT) 10

    While Intel did not release an Intel® vProTM Technology desktop with  ME (Intel® Manageability Engine) Firmware v10, the later versions of firmware are backwards compatible as early as Intel®  7 series chipsets (ME 8.x originally).

    Performance Impact of Intel® Secure Key on OpenSSL

    The goal of this paper is to demonstrate the performance gains obtained when using the Intel® Secure Key in applications that depend on OpenSSL* for cryptographically secure random numbers.
  • Разработчики
  • C/C++
  • OpenSSL
  • DRNG
  • Intel® Secure Key
  • Bull Mountain
  • random number
  • rdrand
  • Технология Intel® vPro™
  • Информационная безопасность
  • Improving the Performance of the Secure Hash Algorithm (SHA-1)

    Improving the performance of the Secure Hash Algorithm (SHA-1) with Intel® Supplemental SSE3 instructions.


  • AES
  • SSSE3
  • Cryptography
  • OpenSSL
  • AES-NI
  • SHA-1
  • Security Community
  • Информационная безопасность
  • Подписаться на OpenSSL