The whole point of simulation is to model the behavior of a design and potential changes against various conditions to determine whether we are getting an expected response; and simulation in software is far cheaper than building hardware and performing a physical simulation and modifying the hardware model each time.
In November 2014, I led a session at SC14 (the event formerly known as “Supercomputing”) titled “The Future of Fortran”. I invited representatives from other vendors and members of the Fortran standards committee to participate, and had some accept, but when it came time for the session, I was up there alone. Oh well…
New Intel processors introduce enhanced instruction set extensions to improve performance or strengthen security of an application. Instruction set extensions like Intel AVX1 and AVX21 are used to improve performance and Intel SHA2 instructions are used for SHA acceleration to increase security of an application.
During the conversation between James Reinders, the Director and Chief Evangelist at Intel Corporation, and Vadim Karpusenko, Principal HPC Research Engineer at Colfax International, recorded on January 30, 2015 at Colfax International in Sunnyvale, CA, we discussed the future of parallel programming and Intel MIC architecture products: Intel Xeon Phi coprocessors, Knights Landing (KNL), and forthcoming 3rd generation - Knights Hill (KNH). We also talked about how students can learn parallel programming and optimization of high performance applications.