Intel® Software Development Emulator

使用英特尔® 软件开发仿真器(英特尔® SDE)计算 “FLOP”

目的

作为分析指标和/或基于性能指标评测目的,浮点运算 (FLOP) 速度广泛运用于高性能计算 (HPC) 社区。 许多 HPC 贡献者(比如戈登·贝尔)要求提交应用时注明 FLOP 速度。

本文所述的方法不依赖于性能监控单元 (PMU) 事件/计数器。 它是一种使用英特尔® SDE 评估 FLOP 的替代性软件方法。

  • Разработчики
  • Профессорский состав
  • Студенты
  • Linux*
  • Сервер
  • Продвинутый
  • Средний
  • Intel® Software Development Emulator
  • FLOP
  • Knight’s Landing
  • Intel® SDE
  • HPC
  • Floating point operations
  • Intel® Xeon Phi™ Coprocessor
  • Intel® Core™ processor family
  • Intel® Many Integrated Core Architecture
  • Calculating “FLOP” using Intel® Software Development Emulator (Intel® SDE)

    Purpose

    Floating point operations (FLOP) rate is used widely by the High Performance Computing (HPC) community as a metric for analysis and/or benchmarking purposes. Many HPC nominations (e.g., Gordon Bell) require the FLOP rate be specified for their application submissions.

    The methodology described here DOES NOT rely on the Performance Monitoring Unit (PMU) events/counters. This is an alternative software methodology to evaluate FLOP using the Intel® SDE.

  • Разработчики
  • Профессорский состав
  • Студенты
  • Linux*
  • Сервер
  • Продвинутый
  • Средний
  • Intel® Software Development Emulator
  • FLOP
  • Knight’s Landing
  • Intel® SDE
  • HPC
  • Floating point operations
  • Intel® Xeon Phi™ Coprocessor
  • Intel® Core™ processor family
  • Intel® Many Integrated Core Architecture
  • Fun with Intel® Transactional Synchronization Extensions

    By now, many of you have heard of Intel® Transactional Synchronization Extensions (Intel® TSX). If you have not, I encourage you to check out this page (http://www.intel.com/software/tsx) before you read further. In a nutshell, Intel TSX provides transactional memory support in hardware, making the lives of developers who need to write synchronization codes for concurrent and parallel applications easier.

    Building and Simulating an App using the HTML5 Development Environment Beta

    The HTML5 section within the Intel Developer Zone was updated just before the US Thanksgiving Holiday to release the new Intel® HTML5 Development Environment Beta and I tried out a few of the sample apps. It took me about fifteen minutes to get one of the samples packaged into an .apk file and running on my Android tablet.

    Exploring Intel® Transactional Synchronization Extensions with Intel® Software Development Emulator

    Intel® Transactional Synchronization Extensions (Intel® TSX) is perhaps one of the most non-trivial extensions of instruction set architecture introduced in the 4th generation Intel® Core™ microarchitecture code name Haswell. Intel® TSX implements hardware support for a best-effort “transactional memory”, which is a simpler mechanism for scalable thread synchronization as opposed to inherently complex fine-grained locking or lock-free algorithms. The extensions have two interfaces: Hardware Lock Elision (HLE) and Restricted Transactional Memory (RTM). 

    AVX debugging или все-таки как?

    AVX определен, зафиксирован и уже идет к нам. Ранее много говорилось о разных способах разработки: компиляция, эмуляция, документация и даже профайлинг (очень рекомендую заглянуть сюда /en-us/avx/ ), – но довольно мало было информации по поводу отладки.

    Хотя, если сказать честно – все уже было. Но сегодня стало еще удобнее и даже нагляднее отлаживать перемещение битов по 256 битному полю AVX регистров.

    Recent Intel® AVX Architectural Changes

    Dear Intel® AVX developers,

    We recently made some significant changes to the Intel® Advanced Vector Extensions Programmer’s Reference Manual (please download the latest version at /sites/avx/). If you are writing tools or software based on AVX, this may impact you. The big changes are a very different FMA syntax and the removal of two instructions (4-operand permutes).

    Подписаться на Intel® Software Development Emulator