We have a current software application that we currently only run a single instance of at once. It requires no user input, simply runs for a pre-defined amount of time essentially navigating through a flowchart and spitting out data. However, we desire to run multiple (100+) instances of it at once. It is a relatively complicated program, with a decent amount of branching as it decides what to do with each node as it reaches it. There is no current memory bandwidth issues, either. However, it is technically running the same code in parallel...
I have a memory allocated on the host (void* A) and this memory is copyed in using the offload pragma (#pragma offload in (A)). and I want to have the coresponding adresse on the MIC. is there a way to have this adresse ?. Also I tired to use the COIBufferGetSinkAddress (COIBUFFER in_Buffer, uint64_t ∗out_pAddress) how aver this function requires a COIBUFFER and not a void*. So if you think this can work, how can I casttype a void* to a COIBUFFER ?
I'm compiling a static library for Xeon Phi,
and this library uses 'zlib compression' library ( http://www.zlib.net/ ) .
When I try to build zlib on my CentOS computer (which contains the Xeon Phi),
I keep getting errors during 'make test' which are shown in the .log file attached.
I've tried 2 configure command, both showed the same errors :
1) CC=icc CFLAGS="-mmic" CHOST=x86_64 ./configure
I noticed that MPSS HostbasedAuthentication issue is in
investaigation according to the latest release notes (2.1.6720-15).
Actually HostbasedAuthentication is working for us.
Consider the case when you
- Create a FFTW3 plan and use the plan for sequential DFT computation on each thread in your parallel region
- Use Intel Math Kernal Library (Intel MKL) FFTW3 wrappers
- Want the best performance
Intel MKL FFTW3 wrappers are thread safe by default. However, you should set one additional Intel MKL variable to get the best performance with Intel MKL. Set the number_of_users_threads variable as described below.
Everyone. I have a question on the #pragma offload approach. I have read the paper "Offload Compiler Runtime for the Intel® Xeon Phi™ Coprocessor" from the website http://software.intel.com/en-us/articles/offload-runtime-for-the-intelr-.... There is a description of offload like this: "At appropriate times, code that is embedded in the host-side binary is extracted, moved and invoked, and memory management is begun.".
I'm trying to execute some Octave operations on Phi, using automatic offload feature, but i'm not being able to do coprocessor starts working.
These are the steps I followed:
- Install Octave 3.2.4 using Intel MKL libraries -> Folowing the article http://software.intel.com/en-us/articles/using-intel-mkl-in-gnu-octave
- After installing Octave I've checked with "ldd /usr/local/bin/octave" that all mkl libraries are correctly linked.
I thought I was done with communication problems, but I guess not. I just installed another three phi cards on a workstation, but I'm having the following communication problem. I can ssh from the host to any phi card and back, but I can't ssh from one card to another, such as from mic0 to mic1. I can't even ping one card from another card. I assume that all cards should be able to communicate with all others on the same host. The default TCP addresses are being used (172.31.1.254 for host, 172.31.1.1 for mic0, 172.31.2.1 for mic1, etc).
Any ideas? Thanks!
Can opensource fortran compilers and mpi libraries be used to compile parallel code to run on 2 coprocessors or are we required to purchase the Intel suite in order to compile and run on the coprocessors?