Intel Xeon Phi Coprocessor

Clarification on the Capabilities of Xeon Phi

I have purchased 3x Xeon Phi 3120P.
Now I realize they are totally useless without the compiler, which is another hidden cost of 700 USD. Then, what I am wondering is whether I will have the same regret once I purchase the compilers as well. This is my situation:

Asynchronous computation on XeonPhi using offload


I would like to run many offloaded regions simultaneously, so their execution overlaps. Is it possible?

I know something about asynchronous offload controlled by signal, but I can not execute next section, when previous was not finished.

1st generation Intel® Xeon Phi™ coprocessor to Knights Landing upgrade program


During different presentations of the Knights Landing, some guys mentioned that there is an upgrade program from the first generation of the Intel Xeon Phi (codenamed Knights Corner) to the 2nd generation - Knights Landing. 

Can someone explains if this program allows the owners of the 1st generation Xeon Phi to upgrade to the 2nd one with some kind of special offers?

If yes, is there an application form that needs to be filled, or maybe an email address to contact?

Sequential Performance on the Xeon Phi

Hi, I have been running different benchmarks on the Xeon Phi. In comparison with a E5-2620 Xeon processor running at 2.00GHz, I noticed a large difference in the sequential performance (almost 10x considering different cases)

Can we conclude Xeon Phi always shares the frequency between hardware threads, even for the sequential codes? In other words, the clock frequency of 1.053GHz will be divided by 4 (if it switches between cores in a round-robin fashion)?

If that is true, would it be possible to take advantage of the full core's frequency at all?

micnativeloadex xlinpack_mic

I am trying to use the micnativeloadex to launch the SMP linpack for MIC that comes packaged with the MKL libs, but its complaining as below

$ micnativeloadex ./xlinpack_mic -a "/home/testing/phi/linpack/lininput_mic"
Either the supplied binary isn't a regular file, or its size is zero.

Any pointers?

System board for Intel Xeon Phi S5120D


Are there system boards compatible with Intel Xeon Phi S5120D (DFF form factor, PCI Express x24, 230 pins)?

For example: Is it possible to use S5120D with Intel System Board S2600GZ (it has two PCIe 3.0 x24 Super Slots,

  Mikhail K.


Check if a process is running on the Intel Phi

Hi everyone,

For energy measurement purposes I need to run a program "X" on the Intel phi, that detects when a program "Y" is running in the Intel phi.

Program X runs natively on the Intel Phi (I launch it directly from an ssh terminal logged in the Intel Phi) while program Y is offloaded from the host using micnativeloadex

Here is the code I use in program X, to find if a process is running is a function, that takes in parameter the name of the process:

Windows External Network Bridge


Is it possible to setup an external network bridge for the PHI on using a windows based operating system?

This information is not provided in the User's Guide.

I have simply highlighted the PHI and External network adapters and created a bridge.

What are the next steps for this to work?

Do i absolutely need to use Linux for this feature?



Xeon Phi - Error in installation

When installing the mpss-3.5.1 on CentOS 7 (kernel 3.10.0-229.el7.x86_64), I got an error when issue " micctrl --initdefaults" as below:

[Error] micrasrelmond: [Parse] START_WITH_SECURITY=false invalid config parameter

[Warning] micrasrelmond: Generating compatibility network config file /opt/intel/mic/filesystem/micrasrelmond/etc/sysconfig/network/ifcfg-mic0 for IDB.

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