Intel® Intrinsics Guide

 
Updated                 Version
12/07/2023           3.6.7

Instruction Set
MMX
SSE family
AVX family
AVX-512 family
AMX family
SVML
Other

Categories


All throughput and latency data is sourced from Intel® 64 and IA-32 Architectures Software Developer Manuals .

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This intrinsic generates a sequence of instructions, which may perform worse than a native instruction. Consider the performance impact of this intrinsic.