Classes
struct	REGDEF_ENTRY

class	REGISTER_SET< _min, _max >

Typedefs
typedef UINT64	REG_CLASS_BITS

typedef class REGISTER_SET< REG_FirstInRegset, REG_LastInRegset >	REGSET

Enumerations
enum	REG { REG_INVALID_ = 0, REG_NONE = 1, REG_FIRST = 2, REG_RBASE, REG_MACHINE_BASE = REG_RBASE, REG_APPLICATION_BASE = REG_RBASE, REG_PHYSICAL_INTEGER_BASE = REG_RBASE, REG_TO_SPILL_BASE = REG_RBASE, REG_GR_BASE = REG_RBASE, REG_RDI = REG_GR_BASE, REG_GDI = REG_RDI, REG_RSI, REG_GSI = REG_RSI, REG_RBP, REG_GBP = REG_RBP, REG_RSP, REG_STACK_PTR = REG_RSP, REG_RBX, REG_GBX = REG_RBX, REG_RDX, REG_GDX = REG_RDX, REG_RCX, REG_GCX = REG_RCX, REG_RAX, REG_GAX = REG_RAX, REG_R8, REG_R9, REG_R10, REG_R11, REG_R12, REG_R13, REG_R14, REG_R15, REG_GR_LAST = REG_R15, REG_SEG_BASE, REG_SEG_CS = REG_SEG_BASE, REG_SEG_SS, REG_SEG_DS, REG_SEG_ES, REG_SEG_FS, REG_SEG_GS, REG_SEG_LAST = REG_SEG_GS, REG_RFLAGS, REG_GFLAGS = REG_RFLAGS, REG_RIP, REG_INST_PTR = REG_RIP, REG_PHYSICAL_INTEGER_END = REG_INST_PTR, REG_AL, REG_AH, REG_AX, REG_CL, REG_CH, REG_CX, REG_DL, REG_DH, REG_DX, REG_BL, REG_BH, REG_BX, REG_BP, REG_SI, REG_DI, REG_SP, REG_FLAGS, REG_IP, REG_EDI, REG_DIL, REG_ESI, REG_SIL, REG_EBP, REG_BPL, REG_ESP, REG_SPL, REG_EBX, REG_EDX, REG_ECX, REG_EAX, REG_EFLAGS, REG_EIP, REG_R8B, REG_R8W, REG_R8D, REG_R9B, REG_R9W, REG_R9D, REG_R10B, REG_R10W, REG_R10D, REG_R11B, REG_R11W, REG_R11D, REG_R12B, REG_R12W, REG_R12D, REG_R13B, REG_R13W, REG_R13D, REG_R14B, REG_R14W, REG_R14D, REG_R15B, REG_R15W, REG_R15D, REG_MM_BASE, REG_MM0 = REG_MM_BASE, REG_MM1, REG_MM2, REG_MM3, REG_MM4, REG_MM5, REG_MM6, REG_MM7, REG_MM_LAST = REG_MM7, REG_XMM_BASE, REG_FIRST_FP_REG = REG_XMM_BASE, REG_XMM0 = REG_XMM_BASE, REG_XMM1, REG_XMM2, REG_XMM3, REG_XMM4, REG_XMM5, REG_XMM6, REG_XMM7, REG_XMM8, REG_XMM9, REG_XMM10, REG_XMM11, REG_XMM12, REG_XMM13, REG_XMM14, REG_XMM15, REG_XMM_SSE_LAST = REG_XMM15, REG_XMM_AVX_LAST = REG_XMM_SSE_LAST, REG_XMM_AVX512_HI16_FIRST, REG_XMM16 = REG_XMM_AVX512_HI16_FIRST, REG_XMM17, REG_XMM18, REG_XMM19, REG_XMM20, REG_XMM21, REG_XMM22, REG_XMM23, REG_XMM24, REG_XMM25, REG_XMM26, REG_XMM27, REG_XMM28, REG_XMM29, REG_XMM30, REG_XMM31, REG_XMM_AVX512_HI16_LAST = REG_XMM31, REG_XMM_AVX512_LAST = REG_XMM_AVX512_HI16_LAST, REG_XMM_LAST = REG_XMM_AVX512_LAST, REG_YMM_BASE, REG_YMM0 = REG_YMM_BASE, REG_YMM1, REG_YMM2, REG_YMM3, REG_YMM4, REG_YMM5, REG_YMM6, REG_YMM7, REG_YMM8, REG_YMM9, REG_YMM10, REG_YMM11, REG_YMM12, REG_YMM13, REG_YMM14, REG_YMM15, REG_YMM_AVX_LAST = REG_YMM15, REG_YMM_AVX512_HI16_FIRST, REG_YMM16 = REG_YMM_AVX512_HI16_FIRST, REG_YMM17, REG_YMM18, REG_YMM19, REG_YMM20, REG_YMM21, REG_YMM22, REG_YMM23, REG_YMM24, REG_YMM25, REG_YMM26, REG_YMM27, REG_YMM28, REG_YMM29, REG_YMM30, REG_YMM31, REG_YMM_AVX512_HI16_LAST = REG_YMM31, REG_YMM_AVX512_LAST = REG_YMM_AVX512_HI16_LAST, REG_YMM_LAST = REG_YMM_AVX512_LAST, REG_ZMM_BASE, REG_ZMM0 = REG_ZMM_BASE, REG_ZMM1, REG_ZMM2, REG_ZMM3, REG_ZMM4, REG_ZMM5, REG_ZMM6, REG_ZMM7, REG_ZMM8, REG_ZMM9, REG_ZMM10, REG_ZMM11, REG_ZMM12, REG_ZMM13, REG_ZMM14, REG_ZMM15, REG_ZMM_AVX512_SPLIT_LAST = REG_ZMM15, REG_ZMM_AVX512_HI16_FIRST, REG_ZMM16 = REG_ZMM_AVX512_HI16_FIRST, REG_ZMM17, REG_ZMM18, REG_ZMM19, REG_ZMM20, REG_ZMM21, REG_ZMM22, REG_ZMM23, REG_ZMM24, REG_ZMM25, REG_ZMM26, REG_ZMM27, REG_ZMM28, REG_ZMM29, REG_ZMM30, REG_ZMM31, REG_ZMM_AVX512_HI16_LAST = REG_ZMM31, REG_ZMM_AVX512_LAST = REG_ZMM_AVX512_HI16_LAST, REG_ZMM_LAST = REG_ZMM_AVX512_LAST, REG_K_BASE, REG_K0 = REG_K_BASE, REG_IMPLICIT_FULL_MASK = REG_K0, REG_K1, REG_K2, REG_K3, REG_K4, REG_K5, REG_K6, REG_K7, REG_K_LAST = REG_K7, REG_TMM0, REG_TMM1, REG_TMM2, REG_TMM3, REG_TMM4, REG_TMM5, REG_TMM6, REG_TMM7, REG_TMM_FIRST = REG_TMM0, REG_TMM_LAST = REG_TMM7, REG_TILECONFIG, REG_MXCSR, REG_MXCSRMASK, REG_ORIG_RAX, REG_ORIG_GAX = REG_ORIG_RAX, REG_FPST_BASE, REG_FPSTATUS_BASE = REG_FPST_BASE, REG_FPCW = REG_FPSTATUS_BASE, REG_FPSW, REG_FPTAG, REG_FPIP_OFF, REG_FPIP_SEL, REG_FPOPCODE, REG_FPDP_OFF, REG_FPDP_SEL, REG_FPSTATUS_LAST = REG_FPDP_SEL, REG_ST_BASE, REG_ST0 = REG_ST_BASE, REG_ST1, REG_ST2, REG_ST3, REG_ST4, REG_ST5, REG_ST6, REG_ST7, REG_ST_LAST = REG_ST7, REG_FPST_LAST = REG_ST_LAST, REG_DR_BASE, REG_DR0 = REG_DR_BASE, REG_DR1, REG_DR2, REG_DR3, REG_DR4, REG_DR5, REG_DR6, REG_DR7, REG_DR_LAST = REG_DR7, REG_CR_BASE, REG_CR0 = REG_CR_BASE, REG_CR1, REG_CR2, REG_CR3, REG_CR4, REG_CR_LAST = REG_CR4, REG_TSSR, REG_LDTR, REG_TR_BASE, REG_TR = REG_TR_BASE, REG_TR3, REG_TR4, REG_TR5, REG_TR6, REG_TR7, REG_TR_LAST = REG_TR7, REG_MACHINE_LAST = REG_TR_LAST, REG_STATUS_FLAGS, REG_DF_FLAG, REG_APPLICATION_LAST = REG_DF_FLAG, REG_TOOL_BASE, REG_SEG_GS_BASE = REG_TOOL_BASE, REG_SEG_FS_BASE, REG_INST_BASE, REG_INST_SCRATCH_BASE = REG_INST_BASE, REG_INST_G0 = REG_INST_SCRATCH_BASE, REG_INST_G1, REG_INST_G2, REG_INST_G3, REG_INST_G4, REG_INST_G5, REG_INST_G6, REG_INST_G7, REG_INST_G8, REG_INST_G9, REG_INST_G10, REG_INST_G11, REG_INST_G12, REG_INST_G13, REG_INST_G14, REG_INST_G15, REG_INST_G16, REG_INST_G17, REG_INST_G18, REG_INST_G19, REG_INST_G20, REG_INST_G21, REG_INST_G22, REG_INST_G23, REG_INST_G24, REG_INST_G25, REG_INST_G26, REG_INST_G27, REG_INST_G28, REG_INST_G29, REG_INST_TOOL_FIRST = REG_INST_G0, REG_INST_TOOL_LAST = REG_INST_G29, REG_BUF_BASE0, REG_BUF_BASE1, REG_BUF_BASE2, REG_BUF_BASE3, REG_BUF_BASE4, REG_BUF_BASE5, REG_BUF_BASE6, REG_BUF_BASE7, REG_BUF_BASE8, REG_BUF_BASE9, REG_BUF_BASE_LAST = REG_BUF_BASE9, REG_BUF_END0, REG_BUF_END1, REG_BUF_END2, REG_BUF_END3, REG_BUF_END4, REG_BUF_END5, REG_BUF_END6, REG_BUF_END7, REG_BUF_END8, REG_BUF_END9, REG_BUF_ENDLAST = REG_BUF_END9, REG_BUF_LAST = REG_BUF_ENDLAST, REG_INST_SCRATCH_LAST = REG_BUF_LAST, REG_INST_G0D, REG_INST_G1D, REG_INST_G2D, REG_INST_G3D, REG_INST_G4D, REG_INST_G5D, REG_INST_G6D, REG_INST_G7D, REG_INST_G8D, REG_INST_G9D, REG_INST_G10D, REG_INST_G11D, REG_INST_G12D, REG_INST_G13D, REG_INST_G14D, REG_INST_G15D, REG_INST_G16D, REG_INST_G17D, REG_INST_G18D, REG_INST_G19D, REG_INST_G20D, REG_INST_G21D, REG_INST_G22D, REG_INST_G23D, REG_INST_G24D, REG_INST_G25D, REG_INST_G26D, REG_INST_G27D, REG_INST_G28D, REG_INST_G29D, REG_TOOL_LAST = REG_INST_G29D, REG_SPECIAL_BASE, REG_X87 = REG_SPECIAL_BASE, REG_SPECIAL_LAST = REG_X87, REG_PIN_BASE, REG_PIN_SEG_GS_VAL = REG_PIN_BASE, REG_PIN_SEG_FS_VAL, REG_LAST_CONTEXT_REG = REG_PIN_SEG_FS_VAL, REG_PIN_GR_BASE, REG_PIN_EDI = REG_PIN_GR_BASE, REG_PIN_ESI, REG_PIN_EBP, REG_PIN_ESP, REG_PIN_EBX, REG_PIN_EDX, REG_PIN_ECX, REG_PIN_EAX, REG_PIN_AL, REG_PIN_AH, REG_PIN_AX, REG_PIN_CL, REG_PIN_CH, REG_PIN_CX, REG_PIN_DL, REG_PIN_DH, REG_PIN_DX, REG_PIN_BL, REG_PIN_BH, REG_PIN_BX, REG_PIN_BP, REG_PIN_SI, REG_PIN_DI, REG_PIN_SP, REG_PIN_RDI, REG_PIN_GDI = REG_PIN_RDI, REG_PIN_RSI, REG_PIN_GSI = REG_PIN_RSI, REG_PIN_RBP, REG_PIN_GBP = REG_PIN_RBP, REG_PIN_RSP, REG_PIN_STACK_PTR = REG_PIN_RSP, REG_PIN_RBX, REG_PIN_GBX = REG_PIN_RBX, REG_PIN_RDX, REG_PIN_GDX = REG_PIN_RDX, REG_PIN_RCX, REG_PIN_GCX = REG_PIN_RCX, REG_PIN_RAX, REG_PIN_GAX = REG_PIN_RAX, REG_PIN_R8, REG_PIN_R9, REG_PIN_R10, REG_PIN_R11, REG_PIN_R12, REG_PIN_R13, REG_PIN_R14, REG_PIN_R15, REG_PIN_DIL, REG_PIN_SIL, REG_PIN_BPL, REG_PIN_SPL, REG_PIN_R8B, REG_PIN_R8W, REG_PIN_R8D, REG_PIN_R9B, REG_PIN_R9W, REG_PIN_R9D, REG_PIN_R10B, REG_PIN_R10W, REG_PIN_R10D, REG_PIN_R11B, REG_PIN_R11W, REG_PIN_R11D, REG_PIN_R12B, REG_PIN_R12W, REG_PIN_R12D, REG_PIN_R13B, REG_PIN_R13W, REG_PIN_R13D, REG_PIN_R14B, REG_PIN_R14W, REG_PIN_R14D, REG_PIN_R15B, REG_PIN_R15W, REG_PIN_R15D, REG_PIN_THREAD_ID, REG_PIN_INDIRREG, REG_PIN_IPRELADDR, REG_PIN_SYSENTER_RESUMEADDR, REG_PIN_SYSCALL_NEXT_PC, REG_PIN_VMENTER, REG_PIN_T_BASE, REG_PIN_T0 = REG_PIN_T_BASE, REG_PIN_T1, REG_PIN_T2, REG_PIN_T3, REG_PIN_T0D, REG_PIN_T1D, REG_PIN_T2D, REG_PIN_T3D, REG_PIN_T0W, REG_PIN_T1W, REG_PIN_T2W, REG_PIN_T3W, REG_PIN_T0L, REG_PIN_T1L, REG_PIN_T2L, REG_PIN_T3L, REG_PIN_T_LAST = REG_PIN_T3L, REG_PIN_THREAD_IDD, REG_TO_SPILL_LAST = REG_PIN_THREAD_IDD, REG_PIN_INST_COND, REG_PIN_INST_T0, REG_PIN_INST_T1, REG_PIN_INST_T2, REG_PIN_INST_T3, REG_PIN_INST_T0D, REG_PIN_INST_T1D, REG_PIN_INST_T2D, REG_PIN_INST_T3D, REG_PIN_INST_T0W, REG_PIN_INST_T1W, REG_PIN_INST_T2W, REG_PIN_INST_T3W, REG_PIN_INST_T0L, REG_PIN_INST_T1L, REG_PIN_INST_T2L, REG_PIN_INST_T3L, REG_PIN_INST_PRESERVED_PREDICATE, REG_PIN_FLAGS_BEFORE_AC_CLEARING, REG_PIN_BRIDGE_ORIG_SP, REG_PIN_BRIDGE_APP_IP, REG_PIN_BRIDGE_SP_BEFORE_ALIGN, REG_PIN_BRIDGE_SP_BEFORE_CALL, REG_PIN_BRIDGE_SP_BEFORE_MARSHALLING_FRAME, REG_PIN_BRIDGE_MARSHALLING_FRAME, REG_PIN_BRIDGE_ON_STACK_CONTEXT_FRAME, REG_PIN_BRIDGE_ON_STACK_CONTEXT_SP, REG_PIN_BRIDGE_MULTI_MEMORYACCESS_FRAME, REG_PIN_BRIDGE_MULTI_MEMORYACCESS_SP, REG_PIN_MULTI_MEM_ACCESS_AND_REWRITE_EMULATION_INFO_FRAME, REG_PIN_OPERANDS_INFO_OP0, REG_PIN_OPERANDS_INFO_OP1, REG_PIN_OPERANDS_INFO_OP2, REG_PIN_OPERANDS_INFO_OP3, REG_PIN_OPERANDS_INFO_GEN_SP, REG_PIN_BRIDGE_TRANS_MEMORY_CALLBACK_FRAME, REG_PIN_BRIDGE_TRANS_MEMORY_CALLBACK_SP, REG_PIN_TRANS_MEMORY_CALLBACK_READ_ADDR, REG_PIN_TRANS_MEMORY_CALLBACK_READ2_ADDR, REG_PIN_TRANS_MEMORY_CALLBACK_WRITE_ADDR, REG_PIN_BRIDGE_SPILL_AREA_CONTEXT_FRAME, REG_PIN_BRIDGE_SPILL_AREA_CONTEXT_SP, REG_PIN_AVX_IN_USE, REG_PIN_SPILLPTR, REG_PIN_GR_LAST = REG_PIN_SPILLPTR, REG_PIN_X87, REG_PIN_MXCSR, REG_PIN_STATUS_FLAGS, REG_PIN_DF_FLAG, REG_PIN_FLAGS, REG_PIN_XMM_BASE, REG_PIN_XMM0 = REG_PIN_XMM_BASE, REG_PIN_XMM1, REG_PIN_XMM2, REG_PIN_XMM3, REG_PIN_XMM4, REG_PIN_XMM5, REG_PIN_XMM6, REG_PIN_XMM7, REG_PIN_XMM8, REG_PIN_XMM9, REG_PIN_XMM10, REG_PIN_XMM11, REG_PIN_XMM12, REG_PIN_XMM13, REG_PIN_XMM14, REG_PIN_XMM15, REG_PIN_XMM_SSE_LAST = REG_PIN_XMM15, REG_PIN_XMM_AVX_LAST = REG_PIN_XMM_SSE_LAST, REG_PIN_XMM_AVX512_HI16_FIRST, REG_PIN_XMM16 = REG_PIN_XMM_AVX512_HI16_FIRST, REG_PIN_XMM17, REG_PIN_XMM18, REG_PIN_XMM19, REG_PIN_XMM20, REG_PIN_XMM21, REG_PIN_XMM22, REG_PIN_XMM23, REG_PIN_XMM24, REG_PIN_XMM25, REG_PIN_XMM26, REG_PIN_XMM27, REG_PIN_XMM28, REG_PIN_XMM29, REG_PIN_XMM30, REG_PIN_XMM31, REG_PIN_XMM_AVX512_HI16_LAST = REG_PIN_XMM31, REG_PIN_XMM_AVX512_LAST = REG_PIN_XMM_AVX512_HI16_LAST, REG_PIN_XMM_LAST = REG_PIN_XMM_AVX512_LAST, REG_PIN_YMM_BASE, REG_PIN_YMM0 = REG_PIN_YMM_BASE, REG_PIN_YMM1, REG_PIN_YMM2, REG_PIN_YMM3, REG_PIN_YMM4, REG_PIN_YMM5, REG_PIN_YMM6, REG_PIN_YMM7, REG_PIN_YMM8, REG_PIN_YMM9, REG_PIN_YMM10, REG_PIN_YMM11, REG_PIN_YMM12, REG_PIN_YMM13, REG_PIN_YMM14, REG_PIN_YMM15, REG_PIN_YMM_AVX_LAST = REG_PIN_YMM15, REG_PIN_YMM_AVX512_HI16_FIRST, REG_PIN_YMM16 = REG_PIN_YMM_AVX512_HI16_FIRST, REG_PIN_YMM17, REG_PIN_YMM18, REG_PIN_YMM19, REG_PIN_YMM20, REG_PIN_YMM21, REG_PIN_YMM22, REG_PIN_YMM23, REG_PIN_YMM24, REG_PIN_YMM25, REG_PIN_YMM26, REG_PIN_YMM27, REG_PIN_YMM28, REG_PIN_YMM29, REG_PIN_YMM30, REG_PIN_YMM31, REG_PIN_YMM_AVX512_HI16_LAST = REG_PIN_YMM31, REG_PIN_YMM_AVX512_LAST = REG_PIN_YMM_AVX512_HI16_LAST, REG_PIN_YMM_LAST = REG_PIN_YMM_AVX512_LAST, REG_PIN_ZMM_BASE, REG_PIN_ZMM0 = REG_PIN_ZMM_BASE, REG_PIN_ZMM1, REG_PIN_ZMM2, REG_PIN_ZMM3, REG_PIN_ZMM4, REG_PIN_ZMM5, REG_PIN_ZMM6, REG_PIN_ZMM7, REG_PIN_ZMM8, REG_PIN_ZMM9, REG_PIN_ZMM10, REG_PIN_ZMM11, REG_PIN_ZMM12, REG_PIN_ZMM13, REG_PIN_ZMM14, REG_PIN_ZMM15, REG_PIN_ZMM_AVX512_SPLIT_LAST = REG_PIN_ZMM15, REG_PIN_ZMM_AVX512_HI16_FIRST, REG_PIN_ZMM16 = REG_PIN_ZMM_AVX512_HI16_FIRST, REG_PIN_ZMM17, REG_PIN_ZMM18, REG_PIN_ZMM19, REG_PIN_ZMM20, REG_PIN_ZMM21, REG_PIN_ZMM22, REG_PIN_ZMM23, REG_PIN_ZMM24, REG_PIN_ZMM25, REG_PIN_ZMM26, REG_PIN_ZMM27, REG_PIN_ZMM28, REG_PIN_ZMM29, REG_PIN_ZMM30, REG_PIN_ZMM31, REG_PIN_ZMM_AVX512_HI16_LAST = REG_PIN_ZMM31, REG_PIN_ZMM_AVX512_LAST = REG_PIN_ZMM_AVX512_HI16_LAST, REG_PIN_ZMM_LAST = REG_PIN_ZMM_AVX512_LAST, REG_PIN_K_BASE, REG_PIN_K0 = REG_PIN_K_BASE, REG_PIN_K1, REG_PIN_K2, REG_PIN_K3, REG_PIN_K4, REG_PIN_K5, REG_PIN_K6, REG_PIN_K7, REG_PIN_K_LAST = REG_PIN_K7, REG_PIN_LAST = REG_PIN_K_LAST, REG_LAST }

enum	REG_ACCESS { REG_ACCESS_READ, REG_ACCESS_WRITE, REG_ACCESS_OVERWRITE }

enum	REGNAME { REGNAME_LAST }

enum	REGWIDTH { REGWIDTH_8 = 0, REGWIDTH_16 = 1, REGWIDTH_32 = 2, REGWIDTH_64 = 3, REGWIDTH_80, REGWIDTH_128, REGWIDTH_256, REGWIDTH_512, REGWIDTH_TILE, REGWIDTH_REG_X87, REGWIDTH_INVALID, REGWIDTH_NATIVE = REGWIDTH_64 }

enum	REG_CLASS { REG_CLASS_NONE = 0, REG_CLASS_PSEUDO, REG_CLASS_GR, REG_CLASS_GRU8, REG_CLASS_GRL8, REG_CLASS_GRH16, REG_CLASS_GRH32, REG_CLASS_SEG, REG_CLASS_MM, REG_CLASS_XMM, REG_CLASS_YMM, REG_CLASS_ZMM, REG_CLASS_K, REG_CLASS_TMM, REG_CLASS_FPST, REG_CLASS_ST, REG_CLASS_CR, REG_CLASS_DR, REG_CLASS_TR, REG_CLASS_FLAGS, REG_CLASS_FLAGS16, REG_CLASS_FLAGS32, REG_CLASS_STATUS_FLAGS, REG_CLASS_DFLAG, REG_CLASS_X87, REG_CLASS_MXCSR, REG_CLASS_MXCSRMASK, REG_CLASS_IP, REG_CLASS_IP16, REG_CLASS_IP32, REG_CLASS_ARCH, REG_CLASS_PIN_GR, REG_CLASS_PIN_GRU8, REG_CLASS_PIN_GRL8, REG_CLASS_PIN_GRH16, REG_CLASS_PIN_GRH32, REG_CLASS_PIN_XMM, REG_CLASS_PIN_YMM, REG_CLASS_PIN_ZMM, REG_CLASS_PIN_K, REG_CLASS_PIN_X87, REG_CLASS_PIN_MXCSR, REG_CLASS_PIN_FLAGS, REG_CLASS_PIN_STATUS_FLAGS, REG_CLASS_PIN_DFLAG }

enum	REG_SUBCLASS { REG_SUBCLASS_NONE = 0, REG_SUBCLASS_REX, REG_SUBCLASS_FULL_STACKPTR, REG_SUBCLASS_PIN_FULL_STACKPTR, REG_SUBCLASS_PIN_TMP, REG_SUBCLASS_PIN_INST_GR, REG_SUBCLASS_PIN_INST_GR_H32, REG_SUBCLASS_PIN_INST_BUF, REG_SUBCLASS_PIN_INST_COND }

enum	REG_ALLOC_TYPE { REG_ALLOC_NONE = 0, REG_ALLOC_PART, REG_ALLOC_ANY_GR, REG_ALLOC_IDENT, REG_ALLOC_CR = REG_ALLOC_IDENT, REG_ALLOC_DR = REG_ALLOC_IDENT, REG_ALLOC_TR = REG_ALLOC_IDENT, REG_ALLOC_ST = REG_ALLOC_IDENT, REG_ALLOC_MM = REG_ALLOC_IDENT, REG_ALLOC_XMM = REG_ALLOC_IDENT, REG_ALLOC_YMM = REG_ALLOC_IDENT, REG_ALLOC_ZMM = REG_ALLOC_IDENT, REG_ALLOC_K = REG_ALLOC_IDENT, REG_ALLOC_TMM = REG_ALLOC_IDENT, REG_ALLOC_SEG = REG_ALLOC_IDENT, REG_ALLOC_STACK_PTR = REG_ALLOC_IDENT, REG_ALLOC_X87 = REG_ALLOC_IDENT, REG_ALLOC_FLAGS = REG_ALLOC_IDENT, REG_ALLOC_STATUS_FLAGS = REG_ALLOC_IDENT, REG_ALLOC_DFLAG = REG_ALLOC_IDENT }

Functions
VOID	InitRegTables ()

BOOL	REG_is_reg (REG reg)

BOOL	REG_is_pseudo (REG reg)

BOOL	REG_is_gr (REG reg)

BOOL	REG_is_fr (REG reg)

BOOL	REG_is_br (REG reg)

BOOL	REG_is_gr64 (REG reg)

BOOL	REG_is_gr32 (REG reg)

BOOL	REG_is_pin_gr32 (REG reg)

BOOL	REG_is_gr16 (REG reg)

BOOL	REG_is_gr8 (REG reg)

BOOL	REG_is_seg (REG reg)

BOOL	REG_is_fr_for_get_context (REG reg)

BOOL	REG_is_mxcsr (REG reg)

BOOL	REG_is_any_mxcsr (REG reg)

BOOL	REG_is_mm (REG reg)

BOOL	REG_is_xmm (REG reg)

BOOL	REG_is_ymm (REG reg)

BOOL	REG_is_zmm (REG reg)

BOOL	REG_is_xmm_ymm_zmm (REG reg)

BOOL	REG_is_any_vector_reg (REG reg)

BOOL	REG_is_tmm (REG reg)

BOOL	REG_is_k_mask (REG reg)

BOOL	REG_is_any_mask (REG reg)

REG	REG_corresponding_ymm_reg (REG reg)

REG	REG_corresponding_zmm_reg (REG reg)

BOOL	REG_is_st (REG reg)

BOOL	REG_is_machine (REG reg)

BOOL	REG_is_application (REG reg)

BOOL	REG_is_pin (REG reg)

BOOL	REG_is_subclass_none (REG reg)

BOOL	REG_is_pin_gpr (REG reg)

BOOL	REG_is_seg_base (REG reg)

BOOL	REG_is_gs_or_fs (REG reg)

BOOL	REG_valid_for_iarg_reg_value (REG reg)

BOOL	REG_is_pin_gr (REG reg)

BOOL	REG_is_pin_gr_half32 (REG reg)

BOOL	REG_is_pin_xmm (REG reg)

BOOL	REG_is_pin_ymm (REG reg)

BOOL	REG_is_pin_zmm (REG reg)

BOOL	REG_is_pin_xmm_ymm_zmm (REG reg)

BOOL	REG_is_pin_k_mask (REG reg)

BOOL	REG_is_avx512_hi16_xmm (const REG xmm)

BOOL	REG_is_avx512_hi16_ymm (const REG ymm)

BOOL	REG_is_gr_type (REG reg)

REG	REG_AppFlags ()

BOOL	REG_is_flags (REG reg)

BOOL	REG_is_pin_flags (REG reg)

BOOL	REG_is_status_flags (REG reg)

BOOL	REG_is_pin_status_flags (REG reg)

BOOL	REG_is_df_flag (REG reg)

BOOL	REG_is_pin_df_flag (REG reg)

BOOL	REG_is_flags_type (REG reg)

BOOL	REG_is_flags_any_size_type (REG reg)

BOOL	REG_is_status_flags_type (REG reg)

BOOL	REG_is_app_status_flags_type (REG reg)

BOOL	REG_is_df_flag_type (REG reg)

BOOL	REG_is_app_df_flag_type (REG reg)

BOOL	REG_is_any_flags_type (REG reg)

BOOL	REG_is_any_pin_flags (REG reg)

BOOL	REG_is_any_app_flags (REG reg)

REG	REG_get_status_flags_reg_of_type (REG reg)

REG	REG_get_df_flag_reg_of_type (REG reg)

REG	REG_get_full_flags_reg_of_type (REG reg)

BOOL	REG_is_stackptr_type (REG reg)

BOOL	REG_is_representative_reg (REG reg)

BOOL	REG_is_pin_inst (REG reg)

BOOL	REG_is_buffer (REG reg)

BOOL	REG_is_inst_scratch (REG reg)

ADDRINT	REG_regSubClassBitMapTable ()

ADDRINT	REG_regDefTable ()

BOOL	REG_is_pin_tmp (REG reg)

REG	REG_INVALID ()

BOOL	REG_valid (REG reg)

UINT16	REG_ConvertX87AbridgedTagToFull (const FXSAVE *fxsave)

UINT8	REG_ConvertX87FullTagToAbridged (UINT16 fullTag)

BOOL	REG_is_pin64 (REG reg)

REG	REG_LastSupportedXmm ()

REG	REG_LastSupportedYmm ()

REG	REG_LastSupportedZmm ()

UINT32	REG_Size (REG reg)

REG	REG_FullRegName (const REG reg)

std::string	REG_StringShort (REG reg)

REG	REG_IdentityCopy (const REG reg)

BOOL	REG_is_Half16 (const REG reg)

REGWIDTH	REG_Width (REG reg)

BOOL	REG_is_Half32 (const REG reg)

BOOL	REG_is_Lower8 (const REG reg)

BOOL	REG_is_Upper8 (const REG reg)

BOOL	REG_is_Any8 (const REG reg)

BOOL	REG_is_partialreg (const REG reg)

BOOL	REGSET_Contains (const REGSET &regset, REG reg)

VOID	REGSET_Insert (REGSET &regset, REG reg)

VOID	REGSET_Remove (REGSET &regset, REG reg)

VOID	REGSET_Clear (REGSET &regset)

VOID	REGSET_AddAll (REGSET &regset)

REG	REGSET_PopNext (REGSET &regset)

UINT32	REGSET_PopCount (const REGSET &regset)

BOOL	REGSET_PopCountIsZero (const REGSET &regset)

std::string	REGSET_StringShort (const REGSET &regset)

REG	PIN_ClaimToolRegister ()

Variables
const REGDEF_ENTRY	_regDefTable []

UINT64	_regClassBitMapTable [REG_LAST]

UINT64	_regSubClassBitMapTable [REG_LAST]

UINT32	_regSpillSizeTable [REG_LAST]

REGWIDTH	_regWidthTable [REG_LAST]

REG_ALLOC_TYPE	_regAllocTypeTable [REG_LAST]

REG	_regFullNameTable [REG_LAST]

REG	_regMachineNameTable [REG_LAST]

REG	_regPinNameTable [REG_LAST]

INT32	_regWidthToBitWidth []

const REG_CLASS_BITS	REGCBIT_APP_ALL

const REG_CLASS_BITS	REGCBIT_PIN_ALL

const REG_CLASS_BITS	REGCBIT_ALL_REGS = REGCBIT_APP_ALL \| REGCBIT_PIN_ALL

const REG_CLASS_BITS	REGCBIT_APP_FLAGS

const REG_CLASS_BITS	REGCBIT_PIN_FLAGS

const REG_CLASS_BITS	REGCBIT_PARTIAL

const REG_SUBCLASS_BITS	REGSBIT_PIN_INST_ALL

const REG_SUBCLASS_BITS	REGSBIT_PIN_SCRATCH_ALL = (_REGCBIT(REG_SUBCLASS_PIN_INST_GR)) \| (_REGCBIT(REG_SUBCLASS_PIN_INST_BUF))

const REG_SUBCLASS_BITS	REGSBIT_STACKPTR_ALL

const REG	REG_FirstInRegset = REG_RBASE

const REG	REG_LastInRegset = REG(REG_LAST - 1)

Detailed Description

Availability:: Mode: JIT & Probe
O/S: Linux & Windows
CPU: All

Typedef Documentation

◆ REG_CLASS_BITS

typedef UINT64 REG_CLASS_BITS

Bit flag that represents a REG_CLASS value.

◆ REGSET

typedef class REGISTER_SET< REG_FirstInRegset, REG_LastInRegset > REGSET

A regset type that contains all registers

Enumeration Type Documentation

◆ REG

enum REG

This file contains REG primitives

The x86 register enum (for both IA-32 and Intel(R) 64 architectures) Note that each register added to this enum, must have a row in the _regDefTable. Note also that the _regDefTable is defined separately for Intel64 and for IA-32.

Enumerator
REG_RDI	rdi
REG_GDI	edi on a 32 bit machine, rdi on 64
REG_RSI	rsi
REG_GSI	esi on a 32 bit machine, rsi on 64
REG_RBP	rbp
REG_GBP	ebp on a 32 bit machine, rbp on 64
REG_RSP	rsp
REG_STACK_PTR	esp on a 32 bit machine, rsp on 64
REG_RBX	rbx
REG_GBX	ebx on a 32 bit machine, rbx on 64
REG_RDX	rdx
REG_GDX	edx on a 32 bit machine, rdx on 64
REG_RCX	rcx
REG_GCX	ecx on a 32 bit machine, rcx on 64
REG_RAX	rax
REG_GAX	eax on a 32 bit machine, rax on 64
REG_TMM0	tmm0 on a 64 bit machine
REG_TMM1	tmm1 on a 64 bit machine
REG_TMM2	tmm2 on a 64 bit machine
REG_TMM3	tmm3 on a 64 bit machine
REG_TMM4	tmm4 on a 64 bit machine
REG_TMM5	tmm5 on a 64 bit machine
REG_TMM6	tmm6 on a 64 bit machine
REG_TMM7	tmm7 on a 64 bit machine
REG_FPTAG	Abridged 8-bit version of x87 tag register.
REG_SEG_GS_BASE	Base address for GS segment. * Segment registers (FS/GS) handling in Pin * Background about segment virtualization support in Pin: Segment virtualization was introduced in Pin in the past in order to support Pin on OS's which didn't contain old (without segment usage) libc in a standard installation. Application and Pin were using 2 different TLS's, however access to them was done through segment registers (Also known as thread-self-pointer registers) (actually through their matching segment descriptor which contain the segment base address). Segment register (selector) can have one value at a time. Changing segment register value back and forth (from application to Pin and the other way around) is very costly performance wise (involve system calls). Also there may have been other limitations. Therefore it was decided to emulate application instructions which use segments registers. This is done by saving segment selector value and segment base address in the spill area (i.e REG_PIN_SEG_GS_VAL and REG_SEG_GS_BASE ) for each thread and performing all segment related instruction (of the application) using their values (by emulating instructions that set these registers and translate instructions that are accessing the memory using fs or gs prefix - we call this virtualizing segment). (This also help when passing effective address of memory operands to analysis routines) In Linux 32 bit the segment base address changes every time we write to a segment register (every time we load GS/FS, the hidden part is also loaded with the segment base address - it's kind of a cache for optimization, to save bus cycles) In order to support this beside emulating these in instructions we also tracked GDT/LDT tables (We store these tables inside Pin and update them every time needed). Today we have PinCRT which doesn't use segment registers, therefore we don't have to virtualize application segment usage and just let application execute these instructions in their original form (without modifying them or without emulating them). Linux In Linux we no longer virtualize application handling of segments: application instructions which uses segments or segments prefix now runs in their original form. In Linux 64 bits we now only track segment base address virtual register by emulating the system call which changes the segment base address (track application segment base address inside a virtual register in addition to updating the application one). In Linux 32 bits it's more complicated: It's hard to track the segment address without fully emulating all writes to segment registers + tracking the GDT/LDT which is a lot of work. Instead we're using GsBaseAddress()/FsBaseAddress() where needed including in PrecomputeSegBaseAddressIfNeeded() which is called from SetupArgumentEa() when needing to compute REG_SEG_FS_BASE/REG_SEG_GS_BASE value (holds the segment base address) macOS In macOS, PIN still use (at least) the system loader which uses the GS segment register, therefore segment virtualization is still used. Windows In Windows we compute segment base address at the beginning (assume it doens't change) and use its value when needed. REG_PIN_SEG_GS_VAL and REG_PIN_SEG_FS_VAL are unused in this platform
REG_SEG_FS_BASE	Base address for FS segment.
REG_INST_SCRATCH_BASE	First available scratch register.
REG_INST_G0	Scratch register used in pintools.
REG_INST_G1	Scratch register used in pintools.
REG_INST_G2	Scratch register used in pintools.
REG_INST_G3	Scratch register used in pintools.
REG_INST_G4	Scratch register used in pintools.
REG_INST_G5	Scratch register used in pintools.
REG_INST_G6	Scratch register used in pintools.
REG_INST_G7	Scratch register used in pintools.
REG_INST_G8	Scratch register used in pintools.
REG_INST_G9	Scratch register used in pintools.
REG_INST_G10	Scratch register used in pintools.
REG_INST_G11	Scratch register used in pintools.
REG_INST_G12	Scratch register used in pintools.
REG_INST_G13	Scratch register used in pintools.
REG_INST_G14	Scratch register used in pintools.
REG_INST_G15	Scratch register used in pintools.
REG_INST_G16	Scratch register used in pintools.
REG_INST_G17	Scratch register used in pintools.
REG_INST_G18	Scratch register used in pintools.
REG_INST_G19	Scratch register used in pintools.
REG_INST_G20	Scratch register used in pintools.
REG_INST_G21	Scratch register used in pintools.
REG_INST_G22	Scratch register used in pintools.
REG_INST_G23	Scratch register used in pintools.
REG_INST_G24	Scratch register used in pintools.
REG_INST_G25	Scratch register used in pintools.
REG_INST_G26	Scratch register used in pintools.
REG_INST_G27	Scratch register used in pintools.
REG_INST_G28	Scratch register used in pintools.
REG_INST_G29	Scratch register used in pintools.
REG_INST_G0D	Scratch register used in pintools.
REG_INST_G1D	Scratch register used in pintools.
REG_INST_G2D	Scratch register used in pintools.
REG_INST_G3D	Scratch register used in pintools.
REG_INST_G4D	Scratch register used in pintools.
REG_INST_G5D	Scratch register used in pintools.
REG_INST_G6D	Scratch register used in pintools.
REG_INST_G7D	Scratch register used in pintools.
REG_INST_G8D	Scratch register used in pintools.
REG_INST_G9D	Scratch register used in pintools.
REG_INST_G10D	Scratch register used in pintools.
REG_INST_G11D	Scratch register used in pintools.
REG_INST_G12D	Scratch register used in pintools.
REG_INST_G13D	Scratch register used in pintools.
REG_INST_G14D	Scratch register used in pintools.
REG_INST_G15D	Scratch register used in pintools.
REG_INST_G16D	Scratch register used in pintools.
REG_INST_G17D	Scratch register used in pintools.
REG_INST_G18D	Scratch register used in pintools.
REG_INST_G19D	Scratch register used in pintools.
REG_INST_G20D	Scratch register used in pintools.
REG_INST_G21D	Scratch register used in pintools.
REG_INST_G22D	Scratch register used in pintools.
REG_INST_G23D	Scratch register used in pintools.
REG_INST_G24D	Scratch register used in pintools.
REG_INST_G25D	Scratch register used in pintools.
REG_INST_G26D	Scratch register used in pintools.
REG_INST_G27D	Scratch register used in pintools.
REG_INST_G28D	Scratch register used in pintools.
REG_INST_G29D	Scratch register used in pintools.

◆ REG_ACCESS

enum REG_ACCESS

Registers access type in context via GetContextReg/SetContextReg

◆ REG_ALLOC_TYPE

enum REG_ALLOC_TYPE

Classification of registers under register allocation. Registers of the same allocation type can replace each other during register re-allocation.

◆ REG_CLASS

enum REG_CLASS

Enumeration of register classes. Each register belongs to one and only one class.

◆ REG_SUBCLASS

enum REG_SUBCLASS

Additional classification of register.

◆ REGNAME

enum REGNAME

x

◆ REGWIDTH

enum REGWIDTH

This file contains REG primitives

register widths

Function Documentation

◆ PIN_ClaimToolRegister()

REG PIN_ClaimToolRegister ( )

Claim a PIN scratch register for use by this tool.

By using this function to claim scratch registers tools can avoid contention if a tool is composed from different components each of which uses scratch registers. Using this function is to be preferred to directly using the REG_INST_Gn register enumerations.

Note that although this function is available in probe mode, use of Pin scratch registers is not currently supported in probe mode, so this function is useless there.

Returns: A register to be used, or REG_INVALID() if all of the scratch registers available for tool use have been allocated.

Availability:: Mode: JIT & Probe
O/S: Linux, Windows & macOS*
CPU: All

◆ REG_AppFlags()

REG REG_AppFlags ( )

inline

Returns: the application flags register

◆ REG_ConvertX87AbridgedTagToFull()

UINT16 REG_ConvertX87AbridgedTagToFull ( const FXSAVE * fxsave )

Returns: the 16 bit version of FPU state tag of abridged tag value given in the input struct.

Parameters

[in] - FXSAVE struct with the desired abridged tag to be converted to full tag. This function converts the 8b FPU state tag from input FXSAVE into 16b tag.

◆ REG_ConvertX87FullTagToAbridged()

UINT8 REG_ConvertX87FullTagToAbridged ( UINT16 fullTag )

Returns: the tag value in abridged 8b form.

Parameters

[in] - 16b version of FPU state tag.

◆ REG_corresponding_ymm_reg()

REG REG_corresponding_ymm_reg ( REG reg )

inline

Returns: the corresponding ymm reg to an xmm reg: e.g. if reg is xmm4 return ymm4 ASSUMES that REG_is_xmm returns TRUE on reg

◆ REG_corresponding_zmm_reg()

REG REG_corresponding_zmm_reg ( REG reg )

inline

Returns: the corresponding zmm reg to an xmm reg: e.g. if reg is xmm4 return zmm4 ASSUMES that REG_is_xmm returns TRUE on reg

◆ REG_FullRegName()

REG REG_FullRegName ( const REG reg )

If reg is a partial register, return the name of the full register containing it. For example, on IA-32, if reg is REG_AL, the function will return REG_EAX. If reg is a full register, the function returns it unchanged. If reg is not in range of REG enumeration, returns invalid reg.

◆ REG_get_df_flag_reg_of_type()

REG REG_get_df_flag_reg_of_type ( REG reg )

inline

Returns: TGiven that reg is either REG_GFLAGS or REG_PIN_FLAGS, return the corresponding *_DF_FLAG reg

◆ REG_get_full_flags_reg_of_type()

REG REG_get_full_flags_reg_of_type ( REG reg )

inline

Returns: the full flags reg of either the app or pin reg - depending on what type of reg reg is

◆ REG_get_status_flags_reg_of_type()

REG REG_get_status_flags_reg_of_type ( REG reg )

inline

Returns: Given that reg is either REG_GFLAGS or REG_PIN_FLAGS, return the corresponding *_STATUS_FLAGS reg

◆ REG_IdentityCopy()

REG REG_IdentityCopy ( const REG reg )

Returns: the application register that is the counterpart of this Pin reg

◆ REG_INVALID()

REG REG_INVALID ( )

inline

Return the invalid register.

◆ REG_is_Any8()

BOOL REG_is_Any8 ( const REG reg )

inline

Return TRUE if reg is a upper or lower 8-bit register

◆ REG_is_any_app_flags()

BOOL REG_is_any_app_flags ( REG reg )

inline

Returns: TRUE iff is Any of the app flag regs

◆ REG_is_any_flags_type()

BOOL REG_is_any_flags_type ( REG reg )

inline

Returns: TRUE iff is Any of the flag regs app or pin

◆ REG_is_any_mask()

BOOL REG_is_any_mask ( REG reg )

inline

Returns: true if reg is a k-mask register or its Pin variant

◆ REG_is_any_mxcsr()

BOOL REG_is_any_mxcsr ( REG reg )

inline

Returns: true if reg is mxcsr or its Pin variant

◆ REG_is_any_pin_flags()

BOOL REG_is_any_pin_flags ( REG reg )

inline

Returns: TRUE iff is Any of the pinflag regs

◆ REG_is_any_vector_reg()

BOOL REG_is_any_vector_reg ( REG reg )

inline

Returns: true if reg is an xmm,ymm, or zmm register, or their Pin variants.

◆ REG_is_app_df_flag_type()

BOOL REG_is_app_df_flag_type ( REG reg )

inline

Returns: TRUE iff is REG_DF_FLAG or PIN_REG_DF_FLAG

◆ REG_is_app_status_flags_type()

BOOL REG_is_app_status_flags_type ( REG reg )

inline

Returns: TRUE iff REG_STATUS_FLAGS

◆ REG_is_application()

BOOL REG_is_application ( REG reg )

inline

Returns: true if reg is an application register

◆ REG_is_avx512_hi16_xmm()

BOOL REG_is_avx512_hi16_xmm ( const REG xmm )

inline

Returns: true if the given xmm is one of xmm16-xmm31

◆ REG_is_avx512_hi16_ymm()

BOOL REG_is_avx512_hi16_ymm ( const REG ymm )

inline

Returns: true if the given ymm is one of ymm16-ymm31

◆ REG_is_br()

BOOL REG_is_br ( REG reg )

inline

Returns: true if reg is a branch register

◆ REG_is_buffer()

BOOL REG_is_buffer ( REG reg )

inline

Returns: TRUE iff is app flags

◆ REG_is_df_flag()

BOOL REG_is_df_flag ( REG reg )

inline

Returns: TRUE iff is app df flag

◆ REG_is_df_flag_type()

BOOL REG_is_df_flag_type ( REG reg )

inline

Returns: TRUE iff is REG_DF_FLAG or PIN_REG_DF_FLAG

◆ REG_is_flags()

BOOL REG_is_flags ( REG reg )

inline

Returns: TRUE iff is app flags

◆ REG_is_flags_any_size_type()

BOOL REG_is_flags_any_size_type ( REG reg )

inline

Returns: TRUE iff both app and pin (and redundant for both) flags regs

◆ REG_is_flags_type()

BOOL REG_is_flags_type ( REG reg )

inline

Returns: TRUE iff both app and pin (and redundant for both) flags regs

◆ REG_is_fr()

BOOL REG_is_fr ( REG reg )

inline

Returns: true if reg is a floating register

◆ REG_is_fr_for_get_context()

BOOL REG_is_fr_for_get_context ( REG reg )

inline

Returns: true if reg is a floating register appropriate for PIN_GetContextReg

◆ REG_is_gr()

BOOL REG_is_gr ( REG reg )

inline

Returns: true if reg is a FULL WIDTH general purpose register

◆ REG_is_gr16()

BOOL REG_is_gr16 ( REG reg )

inline

Returns: true if reg is a 16-bit general purpose register

◆ REG_is_gr32()

BOOL REG_is_gr32 ( REG reg )

inline

Returns: true if reg is a 32-bit general purpose register

◆ REG_is_gr64()

BOOL REG_is_gr64 ( REG reg )

inline

Returns: true if reg is a 64-bit general purpose register

◆ REG_is_gr8()

BOOL REG_is_gr8 ( REG reg )

inline

Returns: true if reg is a 8-bit general purpose register

◆ REG_is_gr_type()

BOOL REG_is_gr_type ( REG reg )

inline

Returns: true if it is a gr reg

◆ REG_is_gs_or_fs()

BOOL REG_is_gs_or_fs ( REG reg )

inline

Return TRUE if the register a GS or FS register

◆ REG_is_Half16()

BOOL REG_is_Half16 ( const REG reg )

inline

This file contains REG primitives

Return TRUE if reg is a lower 16-bit register

◆ REG_is_Half32()

BOOL REG_is_Half32 ( const REG reg )

inline

Return TRUE if reg is a lower 32-bit register, actually any 32 bit register

◆ REG_is_inst_scratch()

BOOL REG_is_inst_scratch ( REG reg )

inline

Returns: TRUE iff is app flags

◆ REG_is_k_mask()

BOOL REG_is_k_mask ( REG reg )

inline

Returns: true if reg is a k-mask register

◆ REG_is_Lower8()

BOOL REG_is_Lower8 ( const REG reg )

inline

Return TRUE if reg is a lower 8-bit register

◆ REG_is_machine()

BOOL REG_is_machine ( REG reg )

inline

Returns: true if reg is a machine register

◆ REG_is_mm()

BOOL REG_is_mm ( REG reg )

inline

Returns: true if reg is an mmx register

◆ REG_is_mxcsr()

BOOL REG_is_mxcsr ( REG reg )

inline

Returns: true if reg is the mxcsr

◆ REG_is_partialreg()

BOOL REG_is_partialreg ( const REG reg )

Return TRUE if reg is a partial register

◆ REG_is_pin()

BOOL REG_is_pin ( REG reg )

inline

Returns: true if reg is a pin register

◆ REG_is_pin64()

BOOL REG_is_pin64 ( REG reg )

inline

Returns: true if reg is a 64-bit pin register

◆ REG_is_pin_df_flag()

BOOL REG_is_pin_df_flag ( REG reg )

inline

Returns: TRUE iff is pin df flags

◆ REG_is_pin_flags()

BOOL REG_is_pin_flags ( REG reg )

inline

Returns: TRUE iff is pin flags

◆ REG_is_pin_gpr()

BOOL REG_is_pin_gpr ( REG reg )

inline

Returns: TRUE iff pin general purpose register

◆ REG_is_pin_gr()

BOOL REG_is_pin_gr ( REG reg )

inline

Returns: true if reg is a FULL WIDTH general purpose pin virtual register

◆ REG_is_pin_gr32()

BOOL REG_is_pin_gr32 ( REG reg )

inline

Returns: true if reg is a 32-bit pin register

◆ REG_is_pin_gr_half32()

BOOL REG_is_pin_gr_half32 ( REG reg )

inline

Returns: true if reg is a FULL WIDTH general purpose pin virtual register

◆ REG_is_pin_inst()

BOOL REG_is_pin_inst ( REG reg )

inline

Returns: TRUE iff is app flags

◆ REG_is_pin_k_mask()

BOOL REG_is_pin_k_mask ( REG reg )

inline

Returns: true if reg is a pin virtual mask register

◆ REG_is_pin_status_flags()

BOOL REG_is_pin_status_flags ( REG reg )

inline

Returns: TRUE iff is pin status flag

◆ REG_is_pin_tmp()

BOOL REG_is_pin_tmp ( REG reg )

inline

Returns: TRUE iff pin tmp regs

◆ REG_is_pin_xmm()

BOOL REG_is_pin_xmm ( REG reg )

inline

Returns: true if reg is a pin virtual sse register

◆ REG_is_pin_xmm_ymm_zmm()

BOOL REG_is_pin_xmm_ymm_zmm ( REG reg )

inline

Returns: true if reg is a Pin xmm, ymm or zmm register

◆ REG_is_pin_ymm()

BOOL REG_is_pin_ymm ( REG reg )

inline

Returns: true if reg is a pin virtual ymm register

◆ REG_is_pin_zmm()

BOOL REG_is_pin_zmm ( REG reg )

inline

Returns: true if reg is a pin virtual zmm register

◆ REG_is_representative_reg()

BOOL REG_is_representative_reg ( REG reg )

inline

Returns: TRUE iff is representative register for internal purposes

◆ REG_is_seg()

BOOL REG_is_seg ( REG reg )

inline

Returns: true if reg is a segment register

◆ REG_is_seg_base()

BOOL REG_is_seg_base ( REG reg )

inline

Returns: true if reg is a segment base address virtual register (REG_SEG_GS_BASE/REG_SEG_FS_BASE)

◆ REG_is_st()

BOOL REG_is_st ( REG reg )

inline

Returns: true if reg is a x87 FPU stack register

◆ REG_is_stackptr_type()

BOOL REG_is_stackptr_type ( REG reg )

inline

Returns: TRUE both app and pin stack ptrs

◆ REG_is_status_flags()

BOOL REG_is_status_flags ( REG reg )

inline

Returns: TRUE iff is is app status flags

◆ REG_is_status_flags_type()

BOOL REG_is_status_flags_type ( REG reg )

inline

Returns: TRUE iff is REG_STATUS_FLAGS or PIN_REG_STATUS_FLAGS

◆ REG_is_subclass_none()

BOOL REG_is_subclass_none ( REG reg )

inline

Returns: TRUE iff subclass of reg is none

◆ REG_is_tmm()

BOOL REG_is_tmm ( REG reg )

inline

Returns: true if reg is a tmm register (AMX - matrix register)

◆ REG_is_Upper8()

BOOL REG_is_Upper8 ( const REG reg )

inline

Return TRUE if reg is a upper 8-bit register

◆ REG_is_xmm()

BOOL REG_is_xmm ( REG reg )

inline

Returns: true if reg is an sse register

◆ REG_is_xmm_ymm_zmm()

BOOL REG_is_xmm_ymm_zmm ( REG reg )

inline

Returns: true if reg is an xmm,ymm, or zmm register

◆ REG_is_ymm()

BOOL REG_is_ymm ( REG reg )

inline

Returns: true if reg is a ymm register

◆ REG_is_zmm()

BOOL REG_is_zmm ( REG reg )

inline

Returns: true if reg is a zmm register

◆ REG_LastSupportedXmm()

REG REG_LastSupportedXmm ( )

Returns: the highest xmm register supported on the current CPU

◆ REG_LastSupportedYmm()

REG REG_LastSupportedYmm ( )

Returns: the highest ymm register supported on the current CPU

◆ REG_LastSupportedZmm()

REG REG_LastSupportedZmm ( )

Returns: the highest zmm register supported on the current CPU

◆ REG_regDefTable()

ADDRINT REG_regDefTable ( )

inline

Returns: TRUE iff is app flags

◆ REG_regSubClassBitMapTable()

ADDRINT REG_regSubClassBitMapTable ( )

inline

Returns: TRUE iff is app flags

◆ REG_Size()

UINT32 REG_Size ( REG reg )

return the register size in bytes

◆ REG_StringShort()

std::string REG_StringShort ( REG reg )

convert a REG into a printable string

◆ REG_valid()

BOOL REG_valid ( REG reg )

inline

Check if register is valid.

◆ REG_valid_for_iarg_reg_value()

BOOL REG_valid_for_iarg_reg_value ( REG reg )

inline

Returns: true if reg value of reg can be requested by IARG_REG_VALUE

◆ REG_Width()

REGWIDTH REG_Width ( REG reg )

inline

return the register width for all regs.

◆ REGSET_AddAll()

VOID REGSET_AddAll ( REGSET & regset )

inline

Insert all registers into the specified regset

◆ REGSET_Clear()

VOID REGSET_Clear ( REGSET & regset )

inline

Remove all registers from the specified regset

◆ REGSET_Contains()

BOOL REGSET_Contains	(	const REGSET &	regset,
		REG	reg
	)

inline

Returns: TRUE if the specified reg is contained in the specified regset

◆ REGSET_Insert()

VOID REGSET_Insert	(	REGSET &	regset,
		REG	reg
	)

inline

Insert the specified reg into the specified regset

◆ REGSET_PopCount()

UINT32 REGSET_PopCount ( const REGSET & regset )

inline

Returns: the number of registers in the specified regset

◆ REGSET_PopCountIsZero()

BOOL REGSET_PopCountIsZero ( const REGSET & regset )

inline

Returns: TRUE if the number of registers in the specified regset is zero

◆ REGSET_PopNext()

REG REGSET_PopNext ( REGSET & regset )

inline

Pop the next register from the specified regset

Returns: the popped register

◆ REGSET_Remove()

VOID REGSET_Remove	(	REGSET &	regset,
		REG	reg
	)

inline

Remove the specified reg from the specified regset

◆ REGSET_StringShort()

std::string REGSET_StringShort ( const REGSET & regset )

inline

Returns: a string with the names of all registers is the specified regset

Variable Documentation

◆ _regDefTable

const REGDEF_ENTRY _regDefTable[]

The main register information table

◆ REG_FirstInRegset

const REG REG_FirstInRegset = REG_RBASE

REG represented by the first bit in the regset vector.

x

◆ REG_LastInRegset

const REG REG_LastInRegset = REG(REG_LAST - 1)

REG represented by the last bit in the regset vector. Most of the code assumes that REG_LAST is not an actual register, so we should not include it in the set. We use REG_LAST-1 for the last registers.

◆ REGCBIT_ALL_REGS

const REG_CLASS_BITS REGCBIT_ALL_REGS = REGCBIT_APP_ALL | REGCBIT_PIN_ALL

Mask of REG_CLASS_BITS values for all valid registers.xx

◆ REGCBIT_APP_ALL

const REG_CLASS_BITS REGCBIT_APP_ALL

Initial value:

=
    _REGCBIT(REG_CLASS_PSEUDO) | (_REGCBIT(REG_CLASS_GR)) | (_REGCBIT(REG_CLASS_GRU8)) | (_REGCBIT(REG_CLASS_GRL8)) |
    (_REGCBIT(REG_CLASS_GRH16)) | (_REGCBIT(REG_CLASS_GRH32)) | (_REGCBIT(REG_CLASS_SEG)) | (_REGCBIT(REG_CLASS_MM)) |
    (_REGCBIT(REG_CLASS_XMM)) | (_REGCBIT(REG_CLASS_YMM)) | (_REGCBIT(REG_CLASS_ZMM)) | (_REGCBIT(REG_CLASS_K)) |
    (_REGCBIT(REG_CLASS_TMM)) | (_REGCBIT(REG_CLASS_FPST)) | (_REGCBIT(REG_CLASS_ST)) | (_REGCBIT(REG_CLASS_CR)) |
    (_REGCBIT(REG_CLASS_DR)) | (_REGCBIT(REG_CLASS_TR)) | (_REGCBIT(REG_CLASS_FLAGS)) | (_REGCBIT(REG_CLASS_FLAGS16)) |
    (_REGCBIT(REG_CLASS_FLAGS32)) | (_REGCBIT(REG_CLASS_STATUS_FLAGS)) | (_REGCBIT(REG_CLASS_DFLAG)) | (_REGCBIT(REG_CLASS_X87)) |
    (_REGCBIT(REG_CLASS_MXCSR)) | (_REGCBIT(REG_CLASS_MXCSRMASK)) | (_REGCBIT(REG_CLASS_IP)) | (_REGCBIT(REG_CLASS_IP16)) |
    (_REGCBIT(REG_CLASS_IP32)) | (_REGCBIT(REG_CLASS_ARCH))

Mask of REG_CLASS_BITS values for all application registers.

◆ REGCBIT_APP_FLAGS

const REG_CLASS_BITS REGCBIT_APP_FLAGS

Initial value:

=
 
    (_REGCBIT(REG_CLASS_FLAGS)) | (_REGCBIT(REG_CLASS_STATUS_FLAGS)) | (_REGCBIT(REG_CLASS_DFLAG))

Mask of REG_CLASS_BITS values for all application flag registers.

◆ REGCBIT_PARTIAL

const REG_CLASS_BITS REGCBIT_PARTIAL

Initial value:

= (_REGCBIT(REG_CLASS_GRU8)) | (_REGCBIT(REG_CLASS_GRL8)) | (_REGCBIT(REG_CLASS_GRH16)) |
                                       (_REGCBIT(REG_CLASS_GRH32)) | (_REGCBIT(REG_CLASS_FLAGS16)) |
                                       (_REGCBIT(REG_CLASS_FLAGS32)) | (_REGCBIT(REG_CLASS_IP16)) | (_REGCBIT(REG_CLASS_IP32)) |
                                       (_REGCBIT(REG_CLASS_PIN_GRU8)) | (_REGCBIT(REG_CLASS_PIN_GRL8)) |
                                       (_REGCBIT(REG_CLASS_PIN_GRH16)) | (_REGCBIT(REG_CLASS_PIN_GRH32))

Mask of REG_CLASS_BITS values for partial registers (excluding XMM, even if AVX is present).

◆ REGCBIT_PIN_ALL

const REG_CLASS_BITS REGCBIT_PIN_ALL

Initial value:

=
 
    (_REGCBIT(REG_CLASS_PIN_GR)) | (_REGCBIT(REG_CLASS_PIN_GRU8)) | (_REGCBIT(REG_CLASS_PIN_GRL8)) |
    (_REGCBIT(REG_CLASS_PIN_GRH16)) | (_REGCBIT(REG_CLASS_PIN_GRH32)) | (_REGCBIT(REG_CLASS_PIN_XMM)) |
    (_REGCBIT(REG_CLASS_PIN_YMM)) | (_REGCBIT(REG_CLASS_PIN_ZMM)) | (_REGCBIT(REG_CLASS_PIN_K)) | (_REGCBIT(REG_CLASS_PIN_X87)) |
    (_REGCBIT(REG_CLASS_PIN_MXCSR)) | (_REGCBIT(REG_CLASS_PIN_FLAGS)) | (_REGCBIT(REG_CLASS_PIN_STATUS_FLAGS)) |
    (_REGCBIT(REG_CLASS_PIN_DFLAG))

Mask of REG_CLASS_BITS values for all Pin registers.

◆ REGCBIT_PIN_FLAGS

const REG_CLASS_BITS REGCBIT_PIN_FLAGS

Initial value:

=

(_REGCBIT(REG_CLASS_PIN_FLAGS)) | (_REGCBIT(REG_CLASS_PIN_STATUS_FLAGS)) | (_REGCBIT(REG_CLASS_PIN_DFLAG))

Mask of REG_CLASS_BITS values for all Pin flag registers.

◆ REGSBIT_PIN_INST_ALL

const REG_SUBCLASS_BITS REGSBIT_PIN_INST_ALL

Initial value:

= (_REGCBIT(REG_SUBCLASS_PIN_INST_GR)) | (_REGCBIT(REG_SUBCLASS_PIN_INST_GR_H32)) |

(_REGCBIT(REG_SUBCLASS_PIN_INST_BUF)) | (_REGCBIT(REG_SUBCLASS_PIN_INST_COND))

Combination of REG_SUBCLASS_BITS flags of all instrumentation registers.

◆ REGSBIT_PIN_SCRATCH_ALL

const REG_SUBCLASS_BITS REGSBIT_PIN_SCRATCH_ALL = (_REGCBIT(REG_SUBCLASS_PIN_INST_GR)) | (_REGCBIT(REG_SUBCLASS_PIN_INST_BUF))

Combination of REG_SUBCLASS_BITS flags of all instrumentation scratch registers.

◆ REGSBIT_STACKPTR_ALL

const REG_SUBCLASS_BITS REGSBIT_STACKPTR_ALL

Initial value:

=

(_REGCBIT(REG_SUBCLASS_FULL_STACKPTR)) | (_REGCBIT(REG_SUBCLASS_PIN_FULL_STACKPTR))

Combination of REG_SUBCLASS_BITS flags of stack registers (both app and pin).

Classes

Typedefs

Enumerations

Functions

Variables

Detailed Description

Typedef Documentation

◆ REG_CLASS_BITS

◆ REGSET

Enumeration Type Documentation

◆ REG

◆ REG_ACCESS

◆ REG_ALLOC_TYPE

◆ REG_CLASS

◆ REG_SUBCLASS

◆ REGNAME

◆ REGWIDTH

Function Documentation

◆ PIN_ClaimToolRegister()

◆ REG_AppFlags()

◆ REG_ConvertX87AbridgedTagToFull()

◆ REG_ConvertX87FullTagToAbridged()

◆ REG_corresponding_ymm_reg()

◆ REG_corresponding_zmm_reg()

◆ REG_FullRegName()

◆ REG_get_df_flag_reg_of_type()

◆ REG_get_full_flags_reg_of_type()

◆ REG_get_status_flags_reg_of_type()

◆ REG_IdentityCopy()

◆ REG_INVALID()

◆ REG_is_Any8()

◆ REG_is_any_app_flags()

◆ REG_is_any_flags_type()

◆ REG_is_any_mask()

◆ REG_is_any_mxcsr()

◆ REG_is_any_pin_flags()

◆ REG_is_any_vector_reg()

◆ REG_is_app_df_flag_type()

◆ REG_is_app_status_flags_type()

◆ REG_is_application()

◆ REG_is_avx512_hi16_xmm()

◆ REG_is_avx512_hi16_ymm()

◆ REG_is_br()

◆ REG_is_buffer()

◆ REG_is_df_flag()

◆ REG_is_df_flag_type()

◆ REG_is_flags()

◆ REG_is_flags_any_size_type()

◆ REG_is_flags_type()

◆ REG_is_fr()

◆ REG_is_fr_for_get_context()

◆ REG_is_gr()

◆ REG_is_gr16()

◆ REG_is_gr32()

◆ REG_is_gr64()

◆ REG_is_gr8()

◆ REG_is_gr_type()

◆ REG_is_gs_or_fs()

◆ REG_is_Half16()

◆ REG_is_Half32()

◆ REG_is_inst_scratch()

◆ REG_is_k_mask()

◆ REG_is_Lower8()

◆ REG_is_machine()

◆ REG_is_mm()

◆ REG_is_mxcsr()

◆ REG_is_partialreg()

◆ REG_is_pin()

◆ REG_is_pin64()

◆ REG_is_pin_df_flag()

◆ REG_is_pin_flags()

◆ REG_is_pin_gpr()

◆ REG_is_pin_gr()

◆ REG_is_pin_gr32()

◆ REG_is_pin_gr_half32()

◆ REG_is_pin_inst()

◆ REG_is_pin_k_mask()

◆ REG_is_pin_status_flags()

◆ REG_is_pin_tmp()

◆ REG_is_pin_xmm()