Intel AMT Features > Hardware Asset > Use Cases > Enumerate Vpro Verification Table > vPro Verification Table Parameter Definitions

vPro Verification Table Parameter Definitions

 Field

Description

Reserved

8 bytes

StructuredVersion

The version of this structure. 16 MSB correspond to the major version, 16 LSB correspond to the minor version. For this revision the structure version is 1.0.

CpuCapabilities

4 bytes of data

Bit 0 - VMX state (1=Enabled)

Bit 1 - SMX state (1=Enabled)

Bit 2 - LT/TXT capability (1=Capable)

Bit 3 - LT/TXT Enabled state (1=Enabled)

Bit 4 -- VT-x Capability (1=Capable)

Bit 5 - VT-x Enabled state (1 = Enabled)= Enabled)

Bits 6:31- Reserved for future expansion. (must be set to “0”)

Use CPUID instruction for support capability or use IA32_FEATURE_CONTROL MSR (MSR 3Ah) to determine the current state

MchCapabilities

8 bytes of data

Bits 0:2 - Function Number of PCI Device.

Bits 3:7 - Device Number of PCI Device.

Bits 8:15 - Bus Number of PCI Device.

Bits 16:31 - Device Identification Number (DID): This field is the

identifier assigned to the (G) MCH core/primary PCI device.

DID will be set to 0xFF if not found.

Bit 32 - VT-d capability of MCH chipsetchipset (1 = Capable)

Bit 33 - VT-d state (1 = Enabled)

Bit 34 - TXT capability of MCH chipsetchipset (1 = Capable)

Bit 35 - TXT state in MCH (1 = Enabled)

Bits 36:63 - Reserved (must be set to “0”)

Example: On Q965 express chipset. CAPID0 register of MCH at

Bus-00/Dev-00/Func-00 at offset E0-EAh should be used. Bit 75 at

this offset of value 0b means LT/TXT is supported by the Chipset

(means TXT capability bit in this table = 1). A value of 1 means

LT/TXT is not supported by the chipset.

On the same register and at same offset at bit position 48 indicates

VTd capability. A value of 0 is VTd capable (VTd capability bit=1 in

this table) and value of 1 means VTd is not capable (VTd capability

bit=0 in this table).

IchCapabilities

8 bytes of data.

Bits 0:2 - Function Number of PCI Device.

Bits 3:7 - Device Number of PCI Device.

Bits 8:15 - Bus Number of PCI Device.

Bits 16:31 - Device Identification Number (DID): This field is the

identifier of ICH PCI device.

DID will be set to 0xFF if not found.

Bits 32:63 - Reserved (must be set to “0”).

MeCapabilities

12 bytes of data.

Bytes 0-3: SKU/Capabilities

Bit 0 - ME enabled/disabled (1 = Enabled)

Bit 1 - Intel QST FW support (1 = Supported)

Bit 2 - Intel ASF FW support (1 = Supported)

Bit 3 - Intel AMT FW support (1 = Supported)

Bit 4 - Reserved for future capabilities (must be set to “0”).

Bit 5 – Intel SBT FW support (1 = Supported)

Bit 6 – Intel Level III management (1 = Supported)*

7-31 - Reserved for future capabilities (must be set to “0”).

Bytes 4-11: ME FW Version.

Bits 32:47 - ME FW Minor Version.

Bits 48:63 - ME FW Major Version.

Bits 64:79 - ME FW Build Number.

Bits 80:95 - ME FW Hotfix Number.

Note: If ME is disabled then other data cannot be retrieved.

*Level III management is no longer supported beginning in Release 9.0.

TpmCapabilities

4 bytes of data.

Bit 0 - Supports TPM on board (1= Supported)

Bit 1 - TPM state (1 = Enabled)

Bit 2:15 - Reserved (must be set to “0”).

Bits 16:23 - Major version of TCG spec to which TPM is designed.

This is same as the value retrieved using the command

TCG_StatusCheck as defined by TCG.

Bits 24:31 - Minor version of TCG spec to which TPM is designed.

NetworkDevice

12 bytes of data.

Wired NIC

Bits 0:2 - Function Number of PCI Device.

Bits 3:7 - Device Number of PCI Device.

Bits 8:15 - Bus Number of PCI Device.

Bits 16:31 - PCI Device Identifier (DID) of wired NIC.

Bits 32:47 Reserved for Wired NIC.

Wireless

Bits 48:95 - Reserved (must be set to “0”).

DID will be set to 0xFF if not found.

BiosCapabilities

4 bytes of data.

Bit 0 - BIOS supports VT-x in BIOS setup screen (can be editable).

Bit 1 - BIOS supports VT-d in BIOS setup screen (can be editable).

Bit 2 - BIOS supports TXT in BIOS setup screen (can be editable).

Bit 3 - BIOS supports TPM in BIOS setup screen (can be editable).

Bit 4 - BIOS supports ME in BIOS setup screen (can be editable).

Bit 5 - BIOS supports VA extensions (ACPI Op region).

Bit 6 - SPI Flash has Platform Data region reserved.

Bit 7:9 - BIOS supported maximum VA version.

000 = Highest version supported by BIOS is VA 2.6.

001 = Highest version supported by BIOS is VA 3.0.

010-111= Reserved for future versions.

Bits 10:31 - Reserved (must be set to “0”).

All reserved bits in the table are initialized to zeros by default.

StructureIdentifier

4 bytes of data

Contains the string “vPro”

Offset-38h contains ‘v’, offset-39h contains ‘P’ and so on. The value

of this is 0x6F725076.

This field is a unique identifier for this structure type.

Note: The same value shall be used for both mobile and desktop

platforms. The name is used just as an identifier for this structure

type.

Reserved

4 bytes reserved for future expansion.

Bits 0:31 Reserved. Set to “0” by default.

 

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