A New Way to Think About Stalls

My name is Robert Reed. I am another application engineer who attended the internal Intel Software Enabling Summit in Garden Grove, and who will be giving you a flavor of the lessons we learned there. This is my first blogging experience, unlike some of the other contributors, but I'm hoping soon to be an old hand at it.



At this point I had hoped to start sharing some information about out-of-order execution stalls, lessons learned at a lecture/lab called Software Optimization and Performance Analysis on Intel® Core™ micro-architecture. However, I discovered after writing my notes that this blog program can't post the pictures. I've attached my original blog entry to this posting, a habit I'll continue while the administrators of this blog investigate what can be done to allow pictures in the future. I hope you'll take the time to open the attachment and learn why CPI (Cycles Per Instruction Retired) is a misleading indicator of performance.



All opinions here are my own and are not the position of Intel Corporation or its subsidiaries.


Intel Core is a trademark or registered trademark of Intel Corporation or its subsidiaries in the United States or other countries.


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