Intel® Xeon Phi™ coprocessor Power Management Pt 0: Introduction and inquiring minds

So exactly which power states exist on the Intel® Xeon Phi™ coprocessor? What happens in each of the power states? Inquiring minds want to know. And since you are, no doubt, aggressively involved in high performance computing (HPC), I am sure you want to know also.

This is not going to be a high powered, in depth, up-to-your-neck-in-technical-detail type of treatise on power management (PM). If you want that, I suggest you read the Intel® Xeon Phi™ Coprocessor Software Developer’s Guide (SDG)1. As a word of warning, when the Power Management section of the SDG refers to writers of SW (i.e. programmers), whether explicitly or implicitly, they do not refer to you or me. Its target audience consists of those poor lost souls that design operating systems (OSs) and drivers. (By the way, in an earlier life, I was one of those “poor lost souls.”) One of the objectives of the series of blogs you are now reading is to look at PM from the perspective of an application developer, i.e. you or I, and not a writer of operating systems or drivers).

I am also not going to talk to what C, P and PC-states are. If you want an introduction to these concepts before digging into this blog series, I recommend (humbly) an earlier blog series I wrote on just that topic. See http://software.intel.com/en-us/user/266847/track. It is a little hard to separate the relevant power management blogs from all my other forum posts and videos, so I list the most important ones in this endnote2.

Briefly, the coprocessor has package-based P-states, core-based C-states (which are sometimes referred to as CC-states) and package-based C-states (PC-states). It also has the capability to operate in Turbo mode3. There are no per-core based P-states.

The host and coprocessor share responsibility for power management on the coprocessor. For some PM activities, the coprocessor operates alone. For others, the host component acts as a gate keeper, sometimes controlling PM, and at other times overriding actions taken by the coprocessor’s PM.

In the forthcoming series, I discuss package-based P-states (including Turbo mode3), core-based C-states and package-based PC-states. I will also discuss what control you have as an application developer over coprocessor PM.

Here is one last note. I cannot guarantee that all the Intel® Xeon Phi™ coprocessor SKUs (i.e. coprocessor types) expose these power management features.

Next up: P-States: Reducing power consumption without impacting performance

1 http://software.intel.com/en-us/articles/intel-xeon-phi-coprocessor-system-software-developers-guide

2 Here is a list of my most relevant earlier blogs

http://software.intel.com/en-us/blogs/2008/03/04/introduction-to-power-management-on-intel-processors

http://software.intel.com/en-us/blogs/2008/05/29/what-exactly-is-a-p-state-pt-1

http://software.intel.com/en-us/blogs/2008/03/27/update-c-states-c-states-and-even-more-c-states

http://software.intel.com/en-us/blogs/2008/04/29/theres-got-to-be-a-catch

http://software.intel.com/en-us/blogs/2008/05/29/what-exactly-is-a-p-state-pt-1

http://software.intel.com/en-us/blogs/2008/08/15/so-how-are-p-states-related-to-power-management

http://software.intel.com/en-us/blogs/2008/07/31/can-p-states-save-overall-energy

3 For those that need a quick refresher, turbo mode is a set of over-clocked P-states that exceed the normal power limits of the silicon. If normally run in this P-state, the silicon would over heat and potentially burn up. Turbo is possible because these normal power limits are computed based upon every core running at maximum performance. There are many situations where the entire power budget is not utilized. In these cases, the power management SW can allow a temporary overclocking.

 

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