Shuffles the low 4 signed or unsigned words in each 128-bit lane of the source operand according to the shuffle control operand. The high qwords in each of 2 128-bit lanes of the source operand are copied to the corresponding high qwords of the result value. The corresponding Intel® AVX 2 instruction is VPSHUFLW.

Syntax

extern __m256i _mm256_shufflelo_epi16(__m256i val, const int control);

Arguments

val

integer source vector

control

immediate control operand

Description

Shuffles the low four signed or unsigned words in each 128-bit lane of the source operand according to the shuffle control operand. The high qwords in each of 2 128-bit lanes of the source operand are copied to the corresponding high qwords of the result value. The shuffle value must be an immediate.

Below is the pseudo-code for the intrinsic:

RESULT[15:0] <- (VAL >> (CONTROL[1:0] *16))[15:0]
RESULT[31:16] <- (VAL >> (CONTROL[3:2] * 16))[15:0]
RESULT[47:32] <- (VAL >> (CONTROL[5:4] * 16))[15:0]
RESULT[63:48] <- (VAL >> (CONTROL[7:6] * 16))[15:0]
RESULT[127:64] <- VAL[127:64]
RESULT[143:128] <- (VAL >> (CONTROL[1:0] *16))[143:128]
RESULT[159:144] <- (VAL >> (CONTROL[3:2] * 16))[143:128]
RESULT[175:160] <- (VAL >> (CONTROL[5:4] * 16))[143:128]
RESULT[191:176] <- (VAL >> (CONTROL[7:6] * 16))[143:128]

RESULT[255:192] <- VAL[255:192]

Returns

Result of the shuffle operation.

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