I ran cpuid with EAX=5 to read the monitor/mwait leaf.
After running cpuid, EDX was: 0x22220. ECX was: 0x3
This means that C4 has 2 sub states.
Where can I find documentation on this 2 sub states ?
What interrupt can bringe the CPU back to C0 ? Must it be ACPI one ?
The South bridge is connected via PCIe to an FPGA.
When the system is in C0, the FPGA creates PCIe interrupts that the CPU handles.
Can this interrupt wake the CPU when it is in C4 ?