Cache line replacement study

Cache line replacement study

Michael Chynoweth (Intel)的头像

TITLE: CACHE LINE REPLACEMENT STUDY

ISSUE_NAME:  L1D_REPLACEMENT, L2_REPLACEMENT, L3_REPLACEMENT

DESCRIPTION:

The cache line replacement study goes through each level of the cache hierarchy and attempts to identify which areas of code are cause heavy replacements.  Typically this study is accomplished after determining that long latency loads are problematic on the application.

The instructions responsible for high amount of cache replacements are not always where the application is spending the majority of its time, since replacements can be driven by the hardware prefetchers and store operations which in the common case do not hold up the architecture pipeline.  This means that a cold area of code can trash your cache causing heavy cache misses in other areas of your code and costing performance. Through traversing large arrays or data structures, developer’s can unknowingly cause heavy cache line replacements.
RELEVANCE:

Cache line replacements are significant for all Intel architectures on every OS.

EXAMPLE:

L1D Replacement calculation (Calculated at module, function and instruction pointer level)
%L1D.REPLACEMENT = L1D.REPLACEMENT / SumOverTheProcess(L1D.REPLACEMENT )

SOLUTION:

The first step is to determine whether the functionality causing heavy replacements is necessary.  If it is necessary then you want to start investigating methodologies for increasing your data locality.   

RELATED_SOURCES: 

http://software.intel.com/en-us/blogs/2010/09/30/utilizing-performance-monitoring-events-to-find-problematic-loads-due-to-latency-in-the-memory-hierarchy/

http://software.intel.com/en-us/blogs/2012/02/13/reducing-cache-misses-in-your-application-on-sandy-bridge-and-atom-architectures/
NOTES:

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