The default BIOS configuration table defines four dedicated PWM outputs as PWM_0 through PWM_3 with programmable frequency and duty cycle.

All of the PWM signals are level transitioned (shifted) from 1.8 VDC to breakout board voltage levels by pullup resistors on the breakout board. Level translation is perform by a Texas Instruments* LSF0108RKSR open drain translator. The expansion board uses a 200 kΩ pullup resistor from the +V3P3V supply to enable EU17 when the expansion board is active.

Refer to Pulse Width Modulators for additional details.

PWM Signal Termination and Conditioning

For information about signal termination and conditioning, definitions of the values in the following table, and how the values were measured, refer to Termination and Conditioning. For an example of how to wire a pullup resistor for a 3.3 V pullup voltage, refer to GPIO Signal Termination and Conditioning.

PWM signal level translation termination recommendations

Signal Name

Pullup Voltage

Rmin (Ω)

CLOAD (pF)

Trise (ns)

Tfall (ns)

PWM_0_LS

PWM_1_LS

PWM_2_LS

PWM_3_LS

3.3

2200

47

134

35

 

有关编译器优化的更完整信息,请参阅优化通知