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  1. mpss 3.4 - No Mic cards found or specified on command line

    https://software.intel.com/zh-cn/forums/intel-many-integrated-core/topic/534607

    micctrl --initdefaults [Warning] No Mic cards found or specified on command line We are able to ... SCIF nodes do not match number of PCI detected devices.

  2. MIC Developer Zone--FAQ | 英特尔® 软件

    https://software.intel.com/zh-cn/articles/MIC_Developer_Zone_FAQ

    Xeon Phi对主机配置有什么具体要求,例如电源,主板,PCI-e接口等? 详细的 ...

  3. Installing MPSS - no MIC Cards found or specified in command line

    https://software.intel.com/zh-cn/forums/intel-many-integrated-core/topic/538897

    2015年1月19日 ... mic 0000:03:00.0: PCI->APIC IRQ transform: INT A -> IRQ 16. I have: .... I added noapic pci=realloc to the kernel boot parameters. Now lspci ...

  4. Big data on MIC

    https://software.intel.com/zh-cn/forums/intel-many-integrated-core/topic/366603

    2013年2月8日 ... Does MIC needs similar memory copy handles like GPU? ... The main ideea is to minimize the data transfer throug the PCI slot but keep the ...

  5. Trouble with Updating MPSS

    https://software.intel.com/zh-cn/forums/intel-many-integrated-core/topic/548980

    2015年4月6日 ... service mpss unload; yum removed intel-mic*. as instructed in docs/readme-en. txt. dmesg reported that the PCI devices were disabled.

  6. MIC reset failed

    https://software.intel.com/zh-cn/forums/intel-many-integrated-core/topic/381735

    2013年3月25日 ... Hi, It seems like I can't get my MIC card working. I followed the ... MIC 0 Test 2 Check the POST code via PCI : FAILED MIC 0 Test 2> Current ...

  7. Xeon Phi not quite working

    https://software.intel.com/zh-cn/forums/intel-many-integrated-core/topic/405220

    ... PCI : FAILED MIC 0 Test 2> Current POST code is 12 (not FF) for MIC 0 MIC 0 Test 3 Connect to the device : SKIPPED MIC 0 Test 3> Prerequisite 'Ensure the ...

  8. FATAL: Module mic not found.

    https://software.intel.com/zh-cn/forums/intel-many-integrated-core/topic/392273

    2013年5月6日 ... To fix this, you have to recompile the MIC kernel module by following .... May 14 15:34:56 goliath kernel: pci 0000:06:00.0: BAR 0: [mem ...

  9. Reg: How to increase Data transfer speed between host and MIC

    https://software.intel.com/zh-cn/forums/intel-many-integrated-core/topic/515046

    2014年5月21日 ... For same amount of data MIC-CPU data transfer speed is much higher(40 times). PCI express speed is 8GB/s. But these timings are no where ...

  10. 您的位置

    https://software.intel.com/zh-cn/forums/intel-many-integrated-core/topic/375154

    2013年3月5日 ... MIC 0 Test 5 Check the POST code via PCI : FAILED MIC 0 Test 5> ... MIC 0 Test 6> Prerequisite 'Ensure the device is online' failed: MIC 0 Test ...

  11. Kernel oops with Intel Xeon Phi 5110P

    https://software.intel.com/zh-cn/forums/intel-many-integrated-core/topic/382119

    2013年3月26日 ... EDAC sbridge: Seeking for: dev 0d.6 PCI ID 8086:3cf5. EDAC MC0: Giving out ... mic 0000:03:00.0: PCI INT A -> GSI 40 (level, low) -> IRQ 40

  12. Flash version too old?

    https://software.intel.com/zh-cn/forums/intel-many-integrated-core/topic/402175

    2013年7月19日 ... MIC 0 Test 7 Compare the PCI configuration : OK MIC 0 Test .... The flash version of MIC is too old, the output of `miccheck` indates that. MIC 0 ...

  13. Overheating Xeon Phi 7110P

    https://software.intel.com/zh-cn/forums/intel-many-integrated-core/topic/498452

    2013年12月25日 ... What can cause that kind of temperature raising just after MIC cards booted up ... Double-wide x16 PCI Express slot for each coprocessor in the ...

  14. Can Intel Xeon Phi be configured to receive data direct from FPGA

    https://software.intel.com/zh-cn/forums/intel-many-integrated-core/topic/540368

    2015年2月5日 ... I have large flow of input data and don't want to have redundant transfers (FPGA board ->Host Memory->MIC->Host Memory) over PCI.

  15. Xeon phi workstation configuration

    https://software.intel.com/zh-cn/forums/intel-many-integrated-core/topic/520356

    To do this "UG4777 Series FPGAs Integrated Block v1.3 for PCI Express User Guide" ... Combine the cross-compiled code into MIC Linux boot image (there is ...

  16. OPENCL MIC DEVICE HW EXCEPTION error

    https://software.intel.com/zh-cn/forums/opencl/topic/357032

    I am obtaining this error a lot of times: *** OPENCL MIC DEVICE HW ... Also the PCI config space subsystem vendor ID and revision ID would be useful. Just so ...

  17. device visible in OS until an attempt to load kernel (or for a while)

    https://software.intel.com/zh-cn/forums/intel-many-integrated-core/topic/539103

    2015年1月21日 ... [ 155.170797] mic 0: failed to reserve aperture space ... "LBAR" is a PCI feature and is not Intel specific - it means that 64bit PCI registers are ...

  18. Compilation shared libraries problem

    https://software.intel.com/zh-cn/forums/intel-many-integrated-core/topic/507182

    2014年3月15日 ... ld: skipping incompatible /opt/intel/composerxe/lib/mic/libirng.a when searching for - ..... 11, MIC 0 Test 2 Check the POST code via PCI : OK ...

  19. SCIF DMA to FPGA

    https://software.intel.com/zh-cn/node/600361

    2015年11月16日 ... However we have a requirement to DMA from the MIC to a block of memory on a FPGA device on the PCI bus. Can someone tell me if there is ...

  20. Intel Xeon Phi 5110P - device is not online

    https://software.intel.com/zh-cn/forums/intel-many-integrated-core/topic/535257

    2014年11月12日 ... 07, Test 1: Check mic driver is loaded ... pass ..... 001, mic 0000:04:00.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16 ...

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