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Exploring Intel® Transactional Synchronization Extensions with Intel® Software Development Emulator

Intel® Transactional Synchronization Extensions (Intel® TSX) is perhaps one of the most non-trivial extensions of instruction set architecture introduced in the 4th generation Intel® Cor

作者: Roman Dementiev (Intel) 最后更新时间: 2019/07/06 - 17:00
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Intel® Transactional Synchronization Extensions (Intel® TSX) profiling with Linux perf

Intel® TSX exposes a speculative execution mode to the programmer to improve locking performance.. Tuning speculation requires heavily on a PMU profiler.

作者: Andreas Kleen (Intel) 最后更新时间: 2019/07/04 - 17:00
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Using HLE and RTM with older compilers with tsx-tools

To use HLE/RTM to improve lock scalability the lock library needs to be enabled.

作者: Andreas Kleen (Intel) 最后更新时间: 2017/06/14 - 13:26
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Monitoring Intel® Transactional Synchronization Extensions with Intel® PCM

After applying a new technology (a new processor, a hardware accelerator, a new instruction, etc) besides measuring the immediate performance delta one requires a method to verify that this technol

作者: Roman Dementiev (Intel) 最后更新时间: 2019/07/04 - 17:00
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Fun with Intel® Transactional Synchronization Extensions

By now, many of you have heard of Intel® Transactional Synchronization Extensions (Intel® TSX).

作者: 最后更新时间: 2019/07/04 - 17:00
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Debug Intel® Transactional Synchronization Extensions

If printf or fprintf functions cause transaction aborts, use Intel® Processor Trace as a work-around.
作者: Roman Dementiev (Intel) 最后更新时间: 2019/07/04 - 17:00
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Web Resources About Intel® Transactional Synchronization Extensions

A list useful technical resources related to Intel® Transactional Synchronization Extensions (Intel® TSX)
作者: Roman Dementiev (Intel) 最后更新时间: 2019/08/30 - 01:53