I'm trying to understand a line in the Intel Architecture manual. It's a description of a memory operation that is guaranteed to be atomic.
We have a similar catalog of vectorization diagnostics for the Intel® C++ Compiler
Product Version: Intel(R) Visual Fortran Compiler XE 15.0 or a later version
Diagnostic 15516: xxxx was not vectorized: cost model has chosen vectorlength of 1 -- maybe possible to override via pragma/directive with vectorlength clause
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I am experimenting with XEON E5620 dual socket server. I perf with event RESOURCE_STALLS.LOAD and RESOURCE_STALLS.STORE in SDM page 2699 of chapter 19.7.
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