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作者: Anoop M. (Intel) 最后更新时间: 2018/12/12 - 18:00
博客

The switch() statement isn't really evil, right?

In my current position, I work to optimize and parallelize codes that deal with genomic data, e.g., DNA, RNA, proteins, etc.

作者: Clay B. (Blackbelt) 最后更新时间: 2019/07/04 - 10:46
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作者: Alex (Intel) 最后更新时间: 2018/05/30 - 07:08
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This paper is a more formal response to an Intel® Developer Zone forum posting. See: (https://software.intel.com/en-us/forums/intel-moderncode-for-parallel-architectures/topic/590710).
作者: jimdempseyatthecove (Blackbelt) 最后更新时间: 2018/12/12 - 18:00
博客

Reduce Boilerplate Code in Parallelized Loops with C++11 Lambda Expressions

Parallelize loops with Intel® Threading Building Blocks using Intel® C++ Compiler for lambda expressions.
作者: gaston-hillar (Blackbelt) 最后更新时间: 2018/12/12 - 18:00
博客

Debug Intel® Transactional Synchronization Extensions

If printf or fprintf functions cause transaction aborts, use Intel® Processor Trace as a work-around.
作者: Roman Dementiev (Intel) 最后更新时间: 2019/07/04 - 17:00
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Implementing a Masked SVML-like Function Explicitly in User-Defined Way

The Intel® Compiler provides SIMD intrinsics APIs for short vector math library (SVML) and starting with Intel® Advanced Vector Extensions

作者: 最后更新时间: 2019/07/16 - 08:37
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Benefits of Intel® Optimized Caffe* in comparison with BVLC Caffe*

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作者: JON J K. (Intel) 最后更新时间: 2018/05/30 - 07:00
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Getting Started with Intel® Optimization for PyTorch* on Second Generation Intel® Xeon® Scalable Processors

Accelerate deep learning PyTorch* code on second generation Intel® Xeon® Scalable processor with Intel® Deep Learning Boost.
作者: Nathan Greeneltch (Intel) 最后更新时间: 2019/10/15 - 16:50
Article

Introduction to GEN Assembly

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作者: Robert Ioffe (Intel) 最后更新时间: 2019/10/21 - 08:18