Article

Vectorizing Loops with Calls to User-Defined External Functions

Introduction

作者: Anoop M. (Intel) 最后更新时间: 2018/12/12 - 18:00
Article

Putting Your Data and Code in Order: Data and layout - Part 2

Apply the concepts of parallelism and distributed memory computing to your code to improve software performance. This paper expands on concepts discussed in Part 1, to consider parallelism, both vectorization (single instruction multiple data SIMD) as well as shared memory parallelism (threading), and distributed memory computing.
作者: David M. 最后更新时间: 2019/07/06 - 16:40
Article

Peel the Onion (Optimization Techniques)

This paper is a more formal response to an Intel® Developer Zone forum posting. See: (https://software.intel.com/en-us/forums/intel-moderncode-for-parallel-architectures/topic/590710).
作者: jimdempseyatthecove (Blackbelt) 最后更新时间: 2018/12/12 - 18:00
博客

Reduce Boilerplate Code in Parallelized Loops with C++11 Lambda Expressions

Parallelize loops with Intel® Threading Building Blocks using Intel® C++ Compiler for lambda expressions.
作者: gaston-hillar (Blackbelt) 最后更新时间: 2018/12/12 - 18:00
Article

Recognize and Measure Vectorization Performance

Get a background on vectorization and learn different techniques to evaluate its effectiveness.
作者: David M. 最后更新时间: 2019/07/06 - 16:40
Article

Optimize Data Layout with SIMD Templates

Contrast results for manually tuning financial data and using data layout templates in the Intel® C++ Compiler.
作者: Nimisha R. (Intel) 最后更新时间: 2018/12/12 - 18:00
Article

Offload Computations from Servers with an Intel® Xeon Phi™ Processor

Learn how to use Offload over Fabric software for a server migration path.
作者: Jan Z. (Intel) 最后更新时间: 2019/07/06 - 16:40
Article

Use SIMD Data Layout Templates (SDLT) Efficiently in Animation

Improve your vectorization project using techniques and methodologies from Intel.
作者: 最后更新时间: 2019/03/25 - 11:40
Article

Improve Application Performance on an Intel® Xeon Phi™ Processor

Learn techniques for vectorizing code, adding thread-level parallelism, and enabling memory optimization.
作者: Nguyen, Loc Q (Intel) 最后更新时间: 2019/06/14 - 11:50
博客

Debug Intel® Transactional Synchronization Extensions

If printf or fprintf functions cause transaction aborts, use Intel® Processor Trace as a work-around.
作者: Roman Dementiev (Intel) 最后更新时间: 2019/07/04 - 17:00