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Article

Benefits of Using Intel® Software Development Emulator

Introduction
作者: Nguyen, Khang T (Intel) 最后更新时间: 2019/07/05 - 20:26
Article

Dynamic Control-flow Graph Generation with PinPlay*

A control-flow graph (CFG) is a fundamental structure used in computer science and engineering for describing and analyzing the structure of an algorithm or program.

作者: 管理 最后更新时间: 2019/07/05 - 20:24
Article

Dynamic Program Slicing with PinPlay

Dynamic Program Slicing is a dynamic program analysis technique that given a slicing criterion (line number, variable,..) finds all statements in the program affecting (if backward

作者: 管理 最后更新时间: 2019/07/06 - 11:44
Article

Intel® Xeon® Processor E7 v3 Product Family

作者: Nguyen, Khang T (Intel) 最后更新时间: 2019/07/06 - 16:40
Article

Performance of Concurrent Java Code Measured in the Intel® Manycore Testing Lab

In the graduate course Concurrent Object Oriented Languages, taught at York University, Toronto, students do three assignment and write a paper based on these assignments.

作者: 最后更新时间: 2017/06/07 - 09:19
Article

Using Intel® MKL and Intel® TBB in the same application

Intel MKL 11.3 has introduced Intel TBB support.

作者: Gennady F. (Blackbelt) 最后更新时间: 2019/08/01 - 09:22
Article

Books - Message Passing Interface (MPI)

This article looks at several books that introduce developers to the topics of Message Passing Interface (MPI), parallel programming, and OpenMP*.
作者: Mike P. (Intel) 最后更新时间: 2018/12/12 - 18:00
Article

Caffe* Training on Multi-node Distributed-memory Systems Based on Intel® Xeon® Processor E5 Family

Caffe is a deep learning framework developed by the Berkeley Vision and Learning Center (BVLC) and one of the most popular community frameworks for image recognition. Caffe is often used as a benchmark together with AlexNet*, a neural network topology for image recognition, and ImageNet*, a database of labeled images.
作者: Gennady F. (Blackbelt) 最后更新时间: 2019/07/05 - 14:54
Article

Usage Models for Cache Allocation Technology in the Intel® Xeon® Processor E5 v4 Family

A number of usage models are possible given the flexible interfaces provided by the Cache Allocation Technology (CAT) feature, including prioritization of important applications and isolation of applications to reduce interference.
作者: Nguyen, Khang T (Intel) 最后更新时间: 2019/07/06 - 16:40
Article

Proof Points for Cache Allocation Technology in the Intel® Xeon® Processor E5 v4 Family

Cache Allocation Technology (CAT) provides benefits across a number of usages, as described in the previous article in this series. This article briefly describes one proof point from the data center (prioritizing a web server to improve its performance) and one from communications (protecting a key communications infrastructure virtual machine (VM)).
作者: Nguyen, Khang T (Intel) 最后更新时间: 2019/07/06 - 16:40