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DE10-Nano Board Schematic

Figure below shows the block diagram of the DE10-Nano development board. Connections are made through the Cyclone V* SoC FPGA. See attached PDF for full schematic details.

作者: 管理 最后更新时间: 2018/08/02 - 22:33
Article

DE10-Nano Board Mechanical Layout

Mechanical layout of the DE10-Nano board.

作者: 管理 最后更新时间: 2017/04/28 - 15:23
Article

How to Write an Image to the microSD* Card for the Terasic DE10-Nano

This tutorial explains how to write an image to the microSD* card (removable flash memory) on the Terasic DE10-Nano*. In the steps below, you'll learn where to download the latest image, how to write the image to the microSD card and what to look for (after powering on the board) to ensure you've correctly programmed the card.
作者: 管理 最后更新时间: 2018/07/10 - 08:00
Article

Terasic DE 10-Nano Development Board User Manual

DE 10-Nano User Manual.
作者: 管理 最后更新时间: 2018/07/10 - 08:00
Article

Compile ‘Hello World’ on the Terasic DE10-Nano Kit

This tutorial explains how to create, compile and run the ‘Hello World’ example application on Linux* for the Terasic DE10-Nano Development Board. You’ll learn how to import and compile a sample application, set up a remote system explorer, and create a debugger configuration to run and debug the application.
作者: 管理 最后更新时间: 2018/08/02 - 22:33
Article

How to Program Your First FPGA Device

This tutorial shows you how to create the hardware equivalent of “Hello World”: a blinking LED. This is a simple exercise to get you started using the Intel® Quartus® software for FPGA development. You’ll learn to compile Verilog code, make pin assignments, create timing constraints, and then program the FPGA to blink one of the eight green user LEDs on the board. You'll use a 50 MHz clock input...
作者: Grevelink, Evelyn (Intel) 最后更新时间: 2018/07/10 - 08:00
Article

ADXL345* Accelerometer Tutorial

Data from the built-in 3-axis accelerometer of the Terasic DE10-Nano is measured on ALL 3 axes to show when the board is in motion. The raw output of the accelerometer is converted to g-force values by a sensor library and then sent to graphing software for data visualization and interpretation.
作者: Grevelink, Evelyn (Intel) 最后更新时间: 2018/07/10 - 08:00
Article

Exploring the HPS and FPGA onboard the Terasic DE10-Nano

Terasic DE10-Nano is a development kit that contains an Intel® Cyclone® device. The Intel® Cyclone® V device contains a Hard Processor System (HPS) and field-programmable gate array (FPGA) with a wealth of peripherals onboard for creating some interesting applications. One of the most basic things to accomplish with this system is to control the LEDs that are physically connected to the FPGA....
作者: Rylee, Michael J (Intel) 最后更新时间: 2018/07/10 - 08:00
Article

A Scalable Path to Commercial IoT Solutions

Get to your development goal with hardware, software, plus data solutions that work together seamlessly, at scale and securely. From the cloud right out to the edge, Intel® IoT Technology offers a complete ecosystem for the connected future. A Smarter World—for Every Enterprise Moving forward is easier when you don’t have to innovate from scratch. Our complete dev kits, comprehensive code...
作者: 管理 最后更新时间: 2018/07/10 - 08:00