These free technical webinars cover tips and techniques that will help sharpen your development skills to create faster, more reliable applications. Technical experts will cover topics ranging from vectorization, code migration, code optimization, using advanced threading techniques (e.g., OpenMP 4.0, Intel® Cilk™ Plus, Intel® TBB), and error checking. Bring programming questions to the live session for our technical experts to answer. A replay of each webinar will be available shortly after the live session so you can share with those unable to attend the live session.
This free webinar series presented tools, tips, and techniques that will help sharpen your development skills on Intel processors/coprocessors including Intel® Xeon® processor and Intel® Xeon Phi™ coprocessor. Intel technical experts as well as open source innovators discuss topics ranging from compiler techniques including vectorization & OpenMP 4.0, performance libraries, debugging, error checking and tuning to boost application and platform performance. Come to the live sessions with your programming questions for Intel technical experts to answer.
Intel® Inspector XE now gives you the ability to set and reset memory baselines and ask for memory leak information from your program whenever you want it. You will learn how to skip analysis of sections of the code you are not interested in, how to choose whether memory growth or on-demand leak detection is the right tool for you, and how to choose the correct analysis level to use, whether you are looking for that one pesky leak or looking to set up a QA process to find future leaks.
The flow graph feature available in Intel® Threading Building Blocks (Intel® TBB) allows users to easily create both dependence graphs and reactive, messaging passing graphs that execute on top of Intel TBB tasks. Users programmatically create nodes and edges that express the computations performed by their application and the dependencies between these computations. The Intel TBB library is then able to exploit the parallelism that is implicit in the graph structure, and the resources available on the target machine, to speed up the application.
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