you might find this collection of technical material about Intel TSX instructions useful: http://www.intel.com/software/tsx
By a suggestion from some senior forum contributors I am making this post sticky.
- Intel Instruction Set Architecture Extensions
- Intel® Architecture Instruction Set Extensions Programming Reference includes:
- Intel® Advanced Vector Extensions 512 (Intel® AVX-512) instructions (AVX512F, AVX512DQ, AVX512BW, AVX512VL, AVX512CD, AVX512PF, AVX512ER)
- Intel® Secure Hash Algorithm (Intel® SHA) extensions
- Intel® Memory Protection Extensions (Intel® MPX)
Can anyone tell me some processor models that support the SHA extensions? I've seen mention that they are supported on the E5-2600 v3 Haswell processors, but I tried the E5-2666v3 on EC2 and it doesn't seem to support it. I tested for support using CPUID.7.0.EBX. I've also tested some Haswell and Broadwell desktop processors and can't find any that support the SHA extension.
I'm doing some tests to compare the code generated by gcc 4.8.3 on a CentOS i7-5600U core while using sse optimizations.
Here is my code :
I'm trying to run an application compiled with gcc 5.2.0 using MPX instructions in SDE 7.31.0 on Linux. (-fno-omit-frame-pointer -fcheck-pointer-bounds -mmpx)
SDE is used as: sde -mpx-mode -- MyApplication
The executable seems to contain a bunch of MPX related symbols, such as
However, SDE outputs "No MPX support". What is this error-message hinting at? No MPX in the executable, no MPX support by SDE, no MPX support by the kernel....???
I am running SDE to trace a program, and the output stops without explanation.
I used -dt_filter_start 0x100401000 and -dt_filter_end 0x100409000 to enclose the portion of the program to trace.
In case the problem is dependent on the program being traced, here are the last several lines of output:
OK, so Skylake has been out for a month, and IDF is long past - but I still don't have an answer to one basic question: will there be any mobile chips that support a AVX512? At first my hopes had been dashed with the announcement that AVX would only be in available on Skylake Xeon, but then they were raised again when we found out that there would be a mobile Xeons for Skylake.
From Intel developer manual I see
IA-32e mode allows software to operate in one of two sub-modes:
- 64-bit mode supports 64-bit OS and 64-bit applications
- Compatibility mode allows most legacy software to run; it co-exists with 64-bit applications under a 64-bit OS
I have a quad-core with HT enabled i.e. 8 logical cores
With KVM I want to run 32 bit and 64 bit VMs on a 64 bit Host OS. I want to allocate resources as follows
Until mid-2015, Intel XED had been distributed externally via Pin kits. However, with a recent change to Pin's C-runtime, it is now required that users of Intel XED obtain Intel XED compiled against a conventional C-runtime from a new site. The Intel XED library that comes with Pin is compiled only to work with the Pin C-runtime and not the standard runtime libraries available on every system.
The new site for distributing Intel XED is: