HOW I CAN GET PERMISSION TO ACESS MANY CORES ,AND HOW I CAN TEST MY PROGRAM
The Manycore Testing Lab (MTL) is closed for renovations and relocation and will reopen in late October. We apologize for any inconvenience during this closure.
I am trying to run an analysis using event-based sampling with VTune Amplifier XE from the command line. The documentation says it is done
amplxe-cl -collect-with runsa -knob event-config=<list of events>
I am revisiting code that I wrote on the Manycore Testing Lab a few months ago and am no longer able to compile it. The error I am getting is as follows:
Error: A license for CCompL could not be obtained
Your license is not current enough to allow you to use this
newer version of our software. Usually this occurs because
your support services license expired before we created this
version. You will need to purchase a new license.
License file(s) used were (in this order):
< list of 21 files >
Hi, I have applied for an access to the many core testing about a month ago . I still do not received a response from Intel . How long generally do someone has to wait for a confirmation . And whom should I mail to see whether I have the qualification to recieve an access . My semester presentation is due next month and it would be beneficial if I could have the lab facilities at hand .
I am trying to run a simple cilk plus program on MTL. The program runs both a serial (non-threaded) and a parallel (using cilk_spawn) version of the same code and reports the timing results for both versions.
I can compile it and run it on the login node, but it shows no speedup in the parallel version because it does not have access to multiple CPUs.
When I try to submit the job using qsub (hoping to get access to multiple cores), I get the following output file:
Subject says it all..
From one of our users:
I have a time loop, and inside of it several loops working on several arrays. Say the sequential time for a given size and number of iterations is ~80 seconds. Then with 2 threads is a little more than 40 seconds, and so on. The speedup varies with the size of the problem (cache issues) but that's not the point.
The trouble is, with 40 threads or so, the time jumps to ~8999 seconds. The results are still correct (by correct I mean equal to the sequential version).
Is it possible to operate the dual channel memory controller of sandybridge in "unganged" mode? That way i can dedicated a memory controller for a core processor.
- 第 1 页